[time-nuts] Controlling FEI 5680A
EWKehren at aol.com
EWKehren at aol.com
Sun Jan 15 05:11:11 EST 2012
I am staying out of that discussion due to lack of knowledge, My question
is wether the input circuit is acceptable or if some one has a different
solution. We have integrated the Shera input including the interrupt counter
on the chip, so there are only three interface pins, interrupt, data out
and clock from the PIC to transfer the data. The interrupt count is pin
selectable, just like the 5/10 MHz divide. We are presently looking at
increasing the counter from 16 to 20 or 24 bits.
I think before going forward there has to be agreement on the input circuit
first, because it will influence every thing else. There may be other
better solutions, the reason I picked this one is it is simple, low cost, very
few parts, solderable and it works.
In a message dated 1/14/2012 10:14:26 P.M. Eastern Standard Time,
magnus at rubidium.dyndns.org writes:
On 01/14/2012 01:32 PM, EWKehren at aol.com wrote:
> I have no expertise when it comes to filter design or programming PIC's
> other micro controllers. But I know what works for me. For 11 years I
> been using Shera controllers with very good results. (I still have some
> assembled extra A&A boards, if any one is interested, please contact me
> off list)
Designing a PI-regulator in digital is pretty simple and works well.
The core routine that needs to be run at the steady sample rate is this:
Ph = getPD();
FI = FI + I*Ph;
F = FI + P*Ph;
where I and P gives the steering properties of the PI regulator.
There is a few things to consider, such as the scaling and width.
An implementational benefit of the above is that the integrator steering
is done prior to the integrator, which makes the integrator state FI
have static dynamics in relationship to the steering parameter I, which
is practical as change of I (which is typically useful to change
bandwidth) will not require rescaling of FI to maintain the same frequency.
The relationship between P and I sets the damping factor of the loop.
The loop bandwidth changes with the square root of I.
It's not too hard to use a quick track-in mode with higher bandwidth and
then scale it to slower mode.
To achieve a quicker track-in of far-distance, diffrentiating the phase
over time can be done, and then feed the integrator loop the scaled
difference. That way will the frequency difference measured (complete
with phase-wraps) steer the frequency state of the integrator and once
the FLL is well tracked in the phase tracking just takes over. The FLL
part can then be removed to reduce disturbances.
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