[time-nuts] FE-5680A FAQ update: question about frequency synthesizer architecture
Graham / KE9H
timenut at austin.rr.com
Fri Jan 27 14:39:28 EST 2012
On 1/27/2012 12:27 PM, beale wrote:
> I added a bit to the "electronics" section of the FE-5680A FAQ as below.
> (Note- until today, I had the 8 and 6 digits transposed, calling it the fe5860a. But no one noticed :-)
> The updated section is below. I measured the 20 MHz input and 5.3 MHz output of the DDS, but I'm puzzled by how the tuning resolution (4.6 mHz) of the DDS output is divided by such a large factor to achieve 0.18 uHz resolution at the final 10 MHz output. Can any frequency synthesizer gurus explain how this is done?
The AD9832 is an Analog Devices DDS which has a 32 bit tuning word.
The way a DDS generates the output, is that it (effectively) has a cosine
wave look-up table, with 2^32 entries that comprise a single cosine wave
The tuning word tells it how many entries the DDS should advance every
reference input clock cycle, then it pushes that amplitude value in the
to the output D->A converter.
So, if the input reference is 20 MHz, then the DDS can generate frequencies
with a resolution step of
Vref/2^32 = 20,000,000 / 4,294,967,296 = 0.0046566 Hz.
The DDS output frequency is (tuning word /2^32) times Vref.
In the actual implementation, rather than a 4 billion entry look-up table,
I am sure they have some algorithm that calculates the amplitude of
a cosine wave, or a much smaller table with a sophisticated interpolation
--- Graham / KE9H
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