[time-nuts] Zero-Crossing Detector Design?

[Bruce Griffiths]

The problem of optimal zero crossing detector design was essentially 
solved by Oliver Collins in the 1990's.
Essentially a series of cascaded limiter stages with appropriate gain 
and bandwidth distribution are used.
With a 10MHz 1V rms signal only 2-3 stages suffices.
However unless you need fs jitter less complex zero crossing detectors 
should suffice.

1) a comparator (or line receiver) based design should achieve sub 10ps 
jitter.

2) AC coupling to the input of a CMOS (AC04, AHC04 LVC04) should achieve 
a jitter of 1ps or less

3) A simple differential pair with AC coupled emitters (reduces 
asymmetry due to component tolerances ) is capable of sub ps jitter.

There is a spreadsheet to assist design of Collins style zero crossing 
detectors at:

http://www.ko4bb.com/~bruce/ZeroCrossingDetectors.html 
<http://www.ko4bb.com/%7Ebruce/ZeroCrossingDetectors.html>

Bruce


paul swed wrote:
> you can search time-nuts there has been a number of very good discussions
> on this.
> Sorry to say how you search is equally a good question.
>
> On Thu, Jul 19, 2012 at 3:19 PM, Chris Hoffman, KG6O<cq.kg6o at gmail.com>wrote:
>
>    
>> Thank you, Azelio! I don't suppose there's an impromptu FAQ page out
>> there, is there?
>>
>> -CH
>>
>> On Jul 19, 2012, at 11:58, Azelio Boriani<azelio.boriani at screen.it>
>> wrote:
>>
>>      
>>> This is sort of a FAQ: the argument was already discussed here. One of
>>>        
>> the
>>      
>>> most interesting idea (in my opinion) is to use an RS485 line receiver
>>>        
>> like
>>      
>>> the ST3485, MAX483, ADM485. They are actually transceivers so they must
>>>        
>> be
>>      
>>> tied permanently in RX. Since they are differential you can also put a
>>>        
>> 1:1
>>      
>>> (or a 1:4 to raise the level) transformer to isolate the input too.
>>>
>>> On Thu, Jul 19, 2012 at 6:03 PM, Chris Hoffman<cq.kg6o at gmail.com>
>>>        
>> wrote:
>>      
>>>        
>>>> Can anyone suggest a good reference design for a zero-crossing
>>>>          
>> detector? I
>>      
>>>> am trying to home an ADC sampler trigger to the 1VRMS (50ohm) 10MHz sin
>>>> from my XL-DC... And now I'm thinking that I should just home the uC
>>>>          
>> clock
>>      
>>>> to it, as well.
>>>>
>>>> Essentially, I believe that I'm looking for an efficient, stable, and
>>>> accurate sine-to-square converter... and I'll welcome any advice in this
>>>> area.
>>>>
>>>> This may also be used in a 1KHz 5Vpp IRIG-B decoder... I don't feel like
>>>> rectifying the signal, to be honest. I want to try to keep a smaller
>>>>          
>> BOM,
>>      
>>>> sense the waveform primarily, and crunch numbers inside the uC.
>>>>
>>>>
>>>> -CH
>>>>
>>>> Chris Hoffman
>>>> cq.kg6o at gmail.com
>>>> http://ar.ctur.us
>>>>
>>>>
>>>>
>>>>
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>>>>          
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