[time-nuts] GPSDO control loops and correcting quantizationerror
Magnus Danielson
magnus at rubidium.dyndns.org
Sun Sep 16 23:15:47 UTC 2012
On 09/16/2012 11:51 PM, Poul-Henning Kamp wrote:
> In message<AD054298-F656-477F-9FB1-5D48C1B07C31 at gmail.com>, Dennis Ferguson wr
> ites:
>
>> If you
>> are using a PLL in both cases, however, then the problems are
>> essentially the same.
>
> Well, not quite: Depending on the stiffness of your PLL, you can
> minimize phase error at the cost of frequency error or frequency
> error at the cost of phase error, and either is a valid engineering
> decision depending which of the two are more important to you.
>
Sometimes such compromises is the only way to go, but sometimes you may
consider to raise your system complexity. One such thing is to increase
the PLL degree. There are many tools in the toolbox.
Another example is the OCXO oven control. A typical OCXO oven tries to
quickly steer back the temperature. During the little temperature trip,
the oscillator will have the wrong frequency, but as the oven settles
again, it will be more or less back where you started. Trouble is, often
you have only gone above or below frequency, so the integral of that
frequency error is a phase-shift. oups. Hope your application wasn't
phase-stability sensitive... I have seen only one vendor address this
issue, complete with graphs showing the phase-creep over several
temperature cycles, and yes... a typical oven shifts phase with a
residual error after a full temperature cycle of ambient temperature,
since the errors doesn't cancel completely.
While this example may not be spot on to the point Poul-Henning is
making, it can be used as a good illustration that frequency stability
goal and phase stability goals isn't necessarily the same.
Going back to the PLL, with a tight PLL, you track in errors quickly.
This looks good as you then track in phase errors and the time error as
it accumulates doesn't become large. On the other hand, when doing this
you need to steer your frequency wider in order to more quickly track in
that phase error. A looser PLL will track in errors more sluggishly, and
hence will use less frequency deviations for track-in, but with the
downside that the frequency errors will remain longer and the time error
will become larger. These are the systematic reactions to phase and
frequency steps and ramps. The degree of the system will also change
these parameters.
It is also important to remember that changes in the reference and
changes within the loop gets low-passed and high-passed (respectively)
by the loop bandwidth. A temperature shift on the locked oscillator will
be a typical in-loop effect which gets high-passed.
Then there is the background noise processes to consider, but we spend
so much time on them already.
Cheers,
Magnsu
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