[time-nuts] GPSDO PLL convergence question

[Magnus Danielson]

On 08/31/2013 04:49 AM, Bob Stewart wrote:
> Hi Bob,
>
> You've given me a lot to work with.  Perhaps the best answer is to put in a user parameter for how many seconds between updates to consider a lock condition.  For warmup, I had planned to put in a 5 minute holdover period, but that could easily be user configurable, as well.
The point about referring to "within 45 degrees" is that you will not
see any remaining cycle slips for sure (well, unless you have a very
bumpy ride). The actual decision point lies earlier if you look at it
theoretical, but this is a handy one. In that context, you can select
any other arbitrary handy limit which fits your needs as long as you are
on the safe side.

Saying  within X ns and X is sufficiently low you are actually saying "I
am locked in, oscillator frequency well within limits and it will keep
pulling in and now I also is within phase/time deviations fitting my needs".

Then, if your goal is only to produce frequency, then the time-limit can
be a bit strange, but for a PLL it is natural as it is Phase Locked
loop. The remaining phase error continue to decay at the time-constant
of the loop, until the oscillators drift and temperature dependence
dominates (there can be other environmental changes too). In fact, you
can expect the oscillator to move around a little and hence require
updates, so an up-date rate thing needs to be well above that background
regulation need, whatever that is. DAC values keep changing even if ever
so slowly.

There is also noise in the frequency reading, which needs to be
compensated by the loop, so that will be exposed in the frequency reading.

So, for long term aspect, the time error is a good and relatively
straight-forward measure to use.

Cheers,
Magnus