[time-nuts] An embedded NTP server

Bob Camp lists at rtty.us
Tue Jan 1 18:50:16 UTC 2013


Hi

The little Arm7/ Cortex-M3 micro's don't pay as much attention to the clock chain as some of their bigger brothers (like a Sandy Bridge I7) do. At least the M3's and M4's I have seen are running the VCO at 50 to 150 MHz to generate a CPU clock at that frequency. The clock is divided by two for the RAM clock, and divided by two again for the flash clock. They may be doing a fake out on the VCO frequency. If they are, it's well hidden. 

Bob

On Jan 1, 2013, at 1:14 PM, Attila Kinali <attila at kinali.ch> wrote:

> Hoi Bob,
> 
> On Tue, 1 Jan 2013 12:03:49 -0500
> Bob Camp <lists at rtty.us> wrote:
> 
> 
>> On Jan 1, 2013, at 11:34 AM, Attila Kinali <attila at kinali.ch> wrote:
>> 
>>> What about those uC that use a VCO that runs up at several 100MHz (i've
>>> seen up to 800MHz) and devide it down to what they actually need.
>>> Shouldnt this improve jitter quite considerably?
> 
>> Most of the small micro's don't get very fancy on the clock chain.
>> You are lucky if the VCO is running at twice the CPU clock. In some
>> cases the input capture(s) (and PWM's)  are running directly on the
>> VCO (at say 72 MHz) and the CPU is running at half  or a quarter of that. 
> 
> That's why i was specifically asking about those uC which use a higher
> frequency VCO for their clock generation. Ie not the tiny 8bit stuff,
> but those in the ARM7/Cortex-M3 class.
> 
> 			Attila Kinali
> 
> -- 
> There is no secret ingredient
>       -- Po, Kung Fu Panda
> 
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