[time-nuts] An embedded NTP server

Dan Kemppainen dan at irtelemetrics.com
Wed Jan 2 15:34:26 UTC 2013


On 1/1/2013 4:58 PM, time-nuts-request at febo.com wrote:
> True story:
>
> Many years ago when the very first ARM silicon arrived and they started
> testing it, it was generally execeeding expectations but a little bit
> flakey at high clock rates.
>
> After the bubbly had been drunk and hangovers subdued, the serious testing
> started and one of the first thing they found was that they had forgotten
> to hook up VCC:  The chip ran entirely on leaked power from the I/O pins,
> most notably the #RESET pin.
>
> When they also connected the VCC pin, it was stable well above spec'ed
> speed.
>
> -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
Ive also seen this, but with a design based on a 8 bit micro running 
at 50Mhz. Took a while to trace down, because the guy how laid out the 
board is usually good about power and gnd connections. We found it by 
putting a volt meter on the VCC pin, and realized it wasn't at 5 
volts. (It's surprising how often people don't check VCC voltages on a 
new layout!)  I never figured a 50Mhz proc at ~75mA would run from 
leakage current into the inputs, but realizing that a lot of I/O have 
protection diodes, it is probably more common than one would expect.

Back on topic (sort of). I've been playing with some of the PIC24 
chips lately. They have some neat oscillator options internally, 
however they seem to have a lot of jitter on I/O compared to other 
micros that run without a VCO and PLL. Again these PIC's are also 
designed to be run at low power if necessary. That said, some do have 
PWM with resolutions down to 1.04nS with special hardware which is 
impressive. I think it's a DLL locked to ~120Mhz ref clock, locked to 
an internal RC at ~7.5Mhz. Lots of multiplying going on there!

Dan





More information about the Time-nuts_lists.febo.com mailing list