[time-nuts] 10 MHz -> 16 MHz clock multiplier

kevin-usenet at horizon.com kevin-usenet at horizon.com
Wed Jan 2 20:20:55 UTC 2013


> What's the simplest way to generate 16 MHz from 10 MHz?

Well, it's a few dollars and *is* a TSSOP, but I've been playing with
TI's CDCE913/925/937/949 series.  They're nice little I2C-programmable
fractional-N PLL chips.

You can either program them in software, or save the config to on-board
flash and pin-select various configs.

They also have onboard varactors and EFC inputs for making a VCXO.

The on-board VCXO range is 80 to 230 MHz, so I'd multiply the 10 MHz
up to 160 MHz and then divide by 10.

I like to throw one in a circuit and know that I can generate whatever
clocks I need in software.  They're also pin-compatible, so if you lay
down a pad for a part larger than needed, you have spare outputs in case
you need them for something.  (The second digit in the P/N is the number
of PLLs; the third is the number of outputs.)

The main limitation is that there's no way to produce a desired phase
relationship between different divisors for e.g. a half-speed clock.


Looking for something cheaper, I can see SiLabs' Si51210 factory-
programmable part, which is cheaper in quantity, but I don't know
the minimum order quantities.


It depends what you mean by "simplest"; the injection-locking idea is
definitely the simplest circuit, but it does require some up-front work
to find coupling capacitor values that work reliably over tolerance.




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