[time-nuts] looking for low-power system for gps ntp timekeeping

mike cook mc235960 at gmail.com
Tue Jul 2 07:32:42 UTC 2013


Le 2 juil. 2013 à 02:52, Bob Camp a écrit :

> Hi
> 
< snip>
> 
> The reference I was making was to a "pie in the sky" 1.8 GHz clocked timer integrated into a CPU chip. That would let you come up with ~ 600 ps timing directly. Since it would be both unusual and very fast, a driver (potentially tightly linked to the kernel) would be needed. That's not a trivial thing….

Is that what you really want? In most modern x86 CPU's you have a TSC which is a 64bit counter incremented at the cpu clock cycle speed . You can capture that with a single instruction. NTP uses that if it is available.  So to get an accurate TI you just take 2 samples and subtract. You just need to take into account interrupt handling latency. I don't think this is available in ARM under that name, but there is a cycle count register CCNT which does the same thing. I think it is 64 bit as well.

Mike

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