[time-nuts] First success with very simple, very low cost GPSDO

Magnus Danielson magnus at rubidium.dyndns.org
Sun Apr 13 08:47:13 EDT 2014


Warren,

On 13/04/14 07:44, WarrenS wrote:
> Magnus wrote
>
>> It may appear so, but the derivate, scale-factor F and integrate does not
>> make the scale-factor F equalent to P, since you are forgetting that the
>> derivate removes the DC term
>
> We don't quite agree on that point yet.
> I can not find anything different or special that your code example is
> doing "at it's output",
> It seems to produce the exact same results as a standard PI controller.
> Also in your code and all PI code the FLL function you talk about is
> provided by the P term, Don't need to add the derivate, scale-factor F
> and integrate term.

You are over-focusing on the derivate canceling the integrate of the 
loop-state, but if you want to play that game and make sense out of it, 
you should not cancel out the integrator in the PI operation, but the 
integrators of the reference (resulting in omega_0) and that of the 
steered oscillator (resulting in omega_0 + omega_e + Ko*Vf). As they go 
through the phase comparator (really a frequency comparator) you have 
Kd*(omega_0 - (omega_0 - omega_e)) = -Kd*omega_e -Kd*Ko*Vf. That is then 
scaled by the F factor into the integrator and the integrator then 
alters it's state to cancel this out. This is happening when frequency 
error (omega_e - it's angular frequency variant) is so large that the 
PLL part is beating and has almost no DC component to charge the 
integrator with. The P factor will simply not aid in building up the 
integrator state like this.

So, that part is a FLL.

I know it is confusing, but one has to see the complete loop, and see 
how you can aid in bulding up the frequency correction state. PLLs is 
really bad at this if the error is large. FLL aiding that state buildup 
helps a lot.

Once you have started to understand the double nature of this loop, it's 
FLL and PLL styles you also realize that the FLL part degrades itself 
into a contributor to the AC-components proportional path, as the 
frequency error component has a zero DC component. However, if the loop 
is put into stress, the FLL starts aiding on the frequency again. There 
is thus no "mode" but rather "dominant characteristics" and depending on 
the frequency error of the loop either the FLL or PLL is dominant.

Cheers,
Magnus



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