[time-nuts] 'CPLDs for clock dividers' Thread

[Ulrich Bangert]

Bob,

I appreciate your postings a lot but can you please explain what property
you are referring to with a sentence like

> you can get into the high 150’s to low 160’s on a 10 MHz

Using numbers without units (maybe: quail eggs per sqare inch ?) makes it
difficult to understand what you are going to say even for experienced time
nutters.

Brent,

> Precious little to add to this, just to confirm that 
> back in another life at Watkins Johnson (early 90's), 
> we used CPLD's for low phase noise dividers all the time.  
> My work at the time was focused on everything but the divider.

Ok, but how much different input signals did you have for one CPLD? If your
answer is "1" then you have given youself the explanation why they worked
ok.

Best regards
Ulrich

> -----Ursprüngliche Nachricht-----
> Von: time-nuts-bounces at febo.com 
> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Bob Camp
> Gesendet: Montag, 6. Januar 2014 13:28
> An: Discussion of precise time and frequency measurement
> Betreff: Re: [time-nuts] 'CPLDs for clock dividers' Thread
> 
> 
> Hi
> 
> If you disable all the internal clocks (normally fairly easy) 
> and your supply is clean and it’s a modern high speed part, 
> you can get into the high 150’s to low 160’s on a 10 MHz 
> output with a CPLD. 
> 
> If you have one of those wonderful old designs where the 
> charge pump clocks (or what ever) stay on all the time, you 
> will be in the 120’s to 130’s. 
> 
> Bob
> 
> On Jan 5, 2014, at 9:11 PM, John C. Westmoreland, P.E. 
> <john at westmorelandengineering.com> wrote:
> 
> > Hello All,
> > 
> > I was looking at the archives - what was the outcome of this:
> > 
> > Thanks to everyone for their advice.  I bought a CoolRunner II 
> > development board (only $39!) and will let you know how it goes.
> > 
> > Matt
> > 
> > On Wed, Feb 3, 2010 at 10:59 AM, Matt Ettus <boyscout at gmail.com 
> > <https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts>> wrote:
> >> * Does anyone have any experience using CPLDs for very low phase 
> >> noise
> > *>* dividers?  You can get an XC9536XL from Xilinx for 
> around $1, and 
> > I
> > *>* thought it would make a good divide by 2 through 10 device.
> > *>>* Matt*
> > 
> > A lot of the discussion focused on the difficulties of 
> downloading the 
> > tools for Altera or Xilinx - the Max II family from Altera was 
> > recommended - but there was no apparent outcome or 
> resolution to this 
> > thread - seemingly.
> > 
> > Does anyone have that CPLD recommendation?
> > 
> > Thanks,
> > John Westmoreland _______________________________________________
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