[time-nuts] Power Supply for AD9852 / AD9854

[Michael Jensen]

For inspiration you can look on this design we use for many purposes, the
design was mainly a beacon exciter but is now also used in many laboratories
in the developing of laser controlled freq. standards (1x10-18) and also as
a direct programmable freq. source with milli Herz resolution locked to a 10
MHz std. 

http://rudius.net/oz2m/ngnb/dds.htm

In the bottom of the web page is diagrams of both power supply and DDS
design, the DDS is controlled by an ATMEGA 128A, all is open source.

// Michael, OZ2ELA

-----Oprindelig meddelelse-----
Fra: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] På vegne
af d0ct0r
Sendt: 16. marts 2014 05:22
Til: time-nuts at febo.com
Emne: Re: [time-nuts] Power Supply for AD9852 / AD9854



Many thanks indeed for detailed answer ! Yes, I will using Evaluation Board
for my project.

Regards,

V.P.

On 2014-03-16 00:06, Charles Steinmetz wrote:
>> By design, DDS "stones" like AD9852 from Analog Devices, required 
>> separated power lines for AVDD, DVDD and VCC.  What will is simple 
>> solution for that ?  I am planing to use following approach: +5V from 
>> linear PS, then three LC filters, then three 3.3V voltage regulators
>> (Ex.: MC33269T) connected to each filter. Is it good enough ?  May be 
>> its better solution for this ? Or may be that could be simplified to 
>> join AVDD and VCC (AVDD will be connected to VCC via 100 Ohm).
> 
> Do you have the AD evaluation board, or are you starting with the bare 
> chip?
> 
> If you really want to know how simple you can make it, why not try it 
> yourself, and see what you need?  You will learn a lot more that way 
> than by asking first every time a question occurs to you.
> 
> Follow the evaluation board plan and put a 0.1uF (100nF) monolithic 
> ceramic capacitor right at each power input pin of the IC itself 
> (something like 10 capacitors per supply).
> 
> First, use one 3.3v regulator and feed its output straight to all 
> three circuits, with simply a local bypass cap for each one (plus the 
> per-pin capacitors as noted above).  Run the DDS and see how it 
> performs.
> 
> Then, see how three separate LC filters perform (each LC fed by the 
> regulated 3.3v supply).
> 
> Finally, feed the unregulated supply to the "upstream" side of each of 
> the three LC filters, and use a separate 3.3v regulator on the 
> "downstream" side for each supply.
> 
> In each case, note carefully (at a lot of different output
> frequencies) the general output noise level and the presence of any 
> spurs and birdies in the output, as well as any logic faults you find 
> (wrong frequency, system hangs up, bus errors, etc.).
> 
> It might be more instructive to run those steps backwards -- first, 
> see how it works with the most complex (and presumably best) supply, 
> then try the simpler circuits and see what problems crop up.
> 
> Of course, with either test protocol it is difficult to know whether 
> you have tried every operating state that could cause a problem, so 
> play with it quite a while with each setup and try to use every 
> function and combination.
> 
> As Chris said, you need to be very careful with your grounds.  These 
> chips are intended to be put on boards with four or more layers.  The 
> AD evaluation board has four layers with a common ground plane for the 
> analog and digital circuitry -- it is possible you could do better 
> with more careful attention to grounding.
> 
> Best regards,
> 
> Charles
> 
> 
> 
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--
WBW,

V.P.
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