[time-nuts] Clock level conversion 5V -> 3.3V

Andy AI.egrps+tn at gmail.com
Wed Oct 1 15:50:19 EDT 2014


If it were me, I'd avoid the active buffers since there is no need for them
when going from higher to lower voltage swings.  The output of a
buffer/inverter is guaranteed to be at least a little less clean than what
you started with.

First, check to see if the "5V" output really is a 5V signal.  If it's TTL,
it might swing only to about 3.5V anyway.  (Connecting a weak load to
ground can make this more pronounced.)  Check to see if your 3.3V part's
input tolerates 5V signals.  The chances may be small, but it might just be
that you can go direct with absolutely nothing in between.

You could use a resistive divider at the destination device that serves two
purposes: both attenuating the signal, and terminating it.  In which case
it's a win-win.

If need be, the resistive divider can add a small DC offset, say if you
need to drive 1.8V logic and the OCXO's Vol isn't low enough.

Instead of a resistive divider, you might use a schottky switching diode to
limit the positive swing.  Then you get close to a replica of the OCXO's
signal through the switching range of the input pin, with attenuation
kicking in only when the voltage starts going too high.

I don't know if these devices are still popular, but there are passive FET
signal 'limiters' that work in a similar way; the signal passes through
unchanged until the instantaneous voltage reaches 3V or so, and then the
FET eases off and doesn't pass higher voltages.  Some years ago they were
popular for making 5V/3.3V signal transitions.  They are supposed to have
negligible delay (well, you know) when the FET is "on", they are
bidirectional (not that it matters to you here), and they consume no
power.  I think the name "Quickswitch" was one of the brand names, and
Pericom and IDT were two of the manufacturers.

Regards,
Andy



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