[time-nuts] LTE-Lite module
SAIDJACK at aol.com
SAIDJACK at aol.com
Sat Oct 18 16:10:29 EDT 2014
attached is the superimposed plot of the standard 20MHz TCXO Phase Noise
and the 10MHz output of my bare-bones divide by 2 flip-flop. The green trace
is the new 20MHz plot, the blue the one I had sent out yesterday at 10MHz,
both sourced from the same TCXO.
You can nicely see that the noise improves by almost exactly 6dB at 100Hz
just as theory would have it. One problem is that my reference has "only" a
noise floor of about -160dBc/Hz at 10MHz, so when I measure 20MHz signals
that actually degrades to the equivalent of -154dBc/Hz due to the reference
Are these plots going to be the same on all the boards? No, these are
typical plots for the particular random unit I tested here, and my particular
test setup. Some of the units will have better noise, some worse. The
variations in performance from crystal to crystal have been discussed here on this
email list many times in the past.
BTW: we recently noticed a very peculiar caveat:
When plugging in the external TCXO (and by the way we decided to mount a
TCXO socket on every one of the eval kits to make life easier for everyone)
and running from the external TCXO there could be a beat frequency from the
internal TCXO, because while the output of the internal TCXO is disabled,
the crystal itself is still powered up and running and thus causing a slight
interference with the external TCXO.
What happens when an external 10MHz TCXO is plugged in with the internal
20MHz TCXO is that there is harmonic mixing at 20MHz, 30MHz etc, and due to
the fact that only the external TCXO is disciplined (the internal TCXO gets
the same exact EFC voltage but will run at a harmonic offset of typically
many hertz) there is a beat frequency that results.
On our particular unit with 20MHz internal TCXO and 10MHz external TCXO
that beat frequency happens to be about 10Hz between the two crystals. So this
results in a number of fairly strong spurs at 10Hz, 20Hz, 30Hz, etc etc
offsets from the carrier.
To fix that issue there are two solutions:
1) Use an external TCXO that is not harmonically related to the internal
TCXO. Such as 10MHz on a 19.2MHz board, or 15.36MHz on a 20MHz board. I
realize that this may not be practical
2) remove the internal TCXO carefully with a heat-gun when using the
Unfortunately we have no way to power-off the internal TCXO completely, and
we cannot avoid physics..
The 10MHz boards with external TCXO won't have this problem as there will
not be a small SMT TCXO mounted on the LTE-Lite module itself, so no
harmonic mixing will happen.
In a message dated 10/18/2014 00:36:27 Pacific Daylight Time,
hmurray at megapathdsl.net writes:
> Here is the resulting 10MHz phase noise plot from the 20MHz TCXO
There is a box in the upper right that says -76.8 dBc at 0.8 Hz and -85
at 0.9 Hz. I can't make sense out of that. It's off scale to the left of
the plot, but looks like it would be higher than those values.
It would be neat to see the phase noise of the un-divided 20 Mhz OSC and
the 10 MHz OSC.
These are my opinions. I hate spam.
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