[time-nuts] LTE-Lite module

[EWKehren at aol.com]

We did the same using a 1 KHz out of the $ 14 ubolx M7 and a Morion .  
Results better than 1 E-10. Some time nuts are now assembling and testing the  
same. Total cost less than $ 10 not counting OCXO or GPS. Most expensive item 
is  the filter capacitor.
Bert Kehren
 
 
In a message dated 10/19/2014 6:15:06 P.M. Eastern Daylight Time,  
albertson.chris at gmail.com writes:

At the  low end of the spectrum, I tried to make the simplest possible
GPSDO what  would still work.  Assuming you have a GPS with  1PPS
output, an  OCXO and a small DC power supply I was able to get the
entire parts for the  controller, board, hookup wire and all for under
$5.  I purposely took  the lowest cost solution at each decision point
just to see what you'd end  up with.   Part were from eBay.

The result is not bad. but I  don't have a really good way to test it.
I'm using a Thunderbolt for the  1PPS and a pretty decent OXCO part.
Why build a low-end GPSDO when yo have  a Thunderbolt?  It's and
experiment.   The way I test is to  place the sine output from the TB
and from my GPSDO both on a dual channel  scope and adjust it so the
two sine waves are superimposed.    Then I wait for them not to be
superimposed.  What I see is that over  1/2 hour or so they get
slightly out of phase but then drift back in  phase,  This happens
cyclically.   It is because of the VERY  simply controller.  I tried to
minimize lines of C++ code.  It's  running about 16 lines of code, more
or less.      Using my  counter I think the GPSDO is good to  1E-10.

Rather than using a  $15 ARM MCU board I used a $3 AVR board and used
100% 16-bit integer math  in a very simple control loop.  There is one
external chip because the  little AVR could not deal with the 10MHz
signal from the OCXO so I used a  divider chip.  I use two 8-bit DACs
to control the EFC on the  OCXO.  One is curse adjustment, one fine.
Added with a resister  network and an RC filter with almost a 1 second
time constant.

If  you can spend $35 you can build a very sophisticated controller
that logs  internal diagnostic data to a computer over USB and displays
it's internal  status on a graphic LCD panel.   Well, actually my
controller has  an LCD status display and logs data to a PC.  But with
those parts  plugged in the cost is closer to $10.

On Sun, Oct 19, 2014 at 2:13 PM,  Bob Camp <kb8tq at n1k.org> wrote:
> Hi
>
>> On Oct  19, 2014, at 5:00 PM, Jim Lux <jimlux at earthlink.net>  wrote:
>>
>> On 10/19/14, 1:08 PM, Bob Camp  wrote:
>>> Hi
>>>
>>>> On Oct 19, 2014,  at 3:35 PM, Charles Steinmetz
>>>>  <csteinmetz at yandex.com> wrote:
>>>>
>>>>  Bob wrote (alluding also to something Poul-Henning  wrote):
>>>>
>>>>> The phase comparison part  of the PLL is pretty straightforward if
>>>>> you are  looking at two RF frequencies. An XOR gate is one
>>>>>  solution, there are many others. Getting something like 100  to
>>>>> 200 ns full scale on the phase comparator makes the  rest of the
>>>>> gizmo much  easier.
>>>>
>>>> All true.   However...
>>>>
>>>>> A 12 bit ADC on a MCU  will get you to 100's of ps per bit.  That
>>>>> is  more resolution (it's < 1 ns) than you need for  this.
>>>>
>>>> Getting an ADC to sample fast  and accurately enough to provide that
>>>> honest resolution is  not trivial.  And if you have that, you'll
>>>> almost  certainly have the resources to do the phase comparator
>>>>  digitally, too, which brings many advantages -- so I see no  reason
>>>> to use an analog  PC.
>>>
>>> If you take a look at some of the newer  ARM MCU’s they are getting
>>> 13+ solid bits out of their ADC’s  at a > 10 KHz rate. That’s more
>>> than good enough for  anything you are trying to do with this design.
>>> There’s no  need to make it any more complex.
>>
>> I'm using the  Freescale Kinetix K20 parts, which have 16 bit 
differential input ADCs, and  built in averaging.  The raw ADC can sample at about  
400kHz.
>>
>> You can easily get 14 bit performance from  these at tens of kHz rates.
>> I need I/Q, so I sample two inputs at  50 kHz (read one, then the other) 
without averaging (so they're about 2.5  microseconds apart), and then 
decimate them through a 2 stage CIC and a 13 tap  FIR filter down to 200 Hz.  
This takes about 60% of the processor running  at 48MHz.
>
> I’m using parts from the same family, but not doing  the whole DDS thing. 
Single input and control loop - the part sleeps about 98%  of the time. The 
demo boards (Freedom boards) are all below $15 and free if  you go to one 
of their (often free) classes.
>
>  Bob
>
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-- 

Chris Albertson
Redondo  Beach,  California
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