[time-nuts] GPSDO and oscillator steering - EFC vs DDS schemes?

[Richard (Rick) Karlquist]

It's been 20 years since I presented that paper in San Francisco
at FCS and I had just about forgotten about it.  It is
flattering to realize that people are still reading it now.

It might be useful for the discussion here if I explained why I
wrote the paper.  We had recently completed the 5071A, which,
unlike previous cesium standards, did not use the C field for fine
tuning.  This strategy turned out to be a real winner, provided
that we had a solution to offsetting the frequency.  The
5071A architecture provides something of a free lunch in this
respect because the synthesizer doesn't have to use the
10811 as a 10 MHz reference and then generate "almost" 10
MHz.  That is problematic for reasons I will explain below
that are probably familiar to many time nuts.  In the 5071A,
we multiply the 10811 to 9280 and then offset it about 87
MHz using a phase locked crystal oscillator that is driven
by the DDS.  This avoids multiplying up the DDS and the
XO cleans up DDs spurs, except very close in ones.  By
using a custom DDS, we could play our cards right to avoid
close in spurs.  The mix from 9280 to 9192.63277 is done
using a sideband, so the "mixer" is "free".  The CBT is
a "free" filter to remove the "carrier" and opposite sideband.
If you want more details, you can read my 1992 paper about
it.

None of this gives us a leg up on a bolt-on circuit that
makes almost 10 MHz from exactly 10 MHz.  That is the worst
thing you can try to do with a DDS in terms of spurs.  The
often seen paradigm of cleaning up a DDS with a phase locked
crystal oscillator is limited because (at least in 1995) DDS
chip sets use RF DACs limited to 10 or 12 bits.  Even now,
RF DAC's are limited to an advertised 16 bits, but still only 10
or 12 effective bits.  So if you want really low spurs, you
can't get them with a DDS.  The XO clean up doesn't work for
close in spurs, inside the PLL bandwidth.  And if and stuck
with an almost but not quite unity synthesis ratio, you are
painted into a corner.

I had always been fascinated with the 5100 direct synthesizer.
In theory, this is extensible to arbitrarily fine steps and
arbitrarily low spurs.  An interesting feature of the 5100
was that the finest resolution "decade" was actually a
continuously tunable variable frequency oscillator.  This
was feasible because the oscillator was divided by my a
huge divisor and could provide a useful output with "infinite"
resolution.  What I did was de-construct the 5100 architecture
and reduce it to a skeleton architecture that took advantage
of the near unity ratio to simplify the block diagram.  The
continuously tunable oscillator was replaced by a DDS.  It
took advantage of the availability of cheap 10.7 MHz filters.
Even if I could have chosen any center frequency I wanted,
these turned out to be about right, assuming you are working
at 10 MHz.  If you wanted to make a 5 MHz version, or a 100 MHz
version, you would have to get custom made filters.

About that time, HP started getting into the "smart clock"
business.  Although I was able to add varactor tuning to the
E1938A oscillator without degrading its stability, it
created a new problem of how to generate the DC tuning voltage.
To help with this, I put a 2.5V voltage reference inside
the E1938A.  The initial reference I chose turned out to be
noisy and I had to replace it with a lower noise chip.
Both the tuning voltage and the reference were brought
out of the E1938A "hockey puck" with dedicated return
lines, to avoid ground loops.

This still left the problem of coming up with a very stable
and accurate DC DAC.  IMHO, the smart clock designers never
really solved this problem.  They just got by with a marginal
system.  They didn't have the space to build an offset
synthesizer like the one in my 1995 paper.

A few years ago, Agilent introduced an arbitrary waveform
synthesizer using a very advanced RF DAC code-named "Griffin"
that was also proposed to be used in various other instruments.
This chip could be used to make an interesting offset
synthesizer, but the cost and complexity would make the
architecture in my 1995 paper look really attractive.
The Griffin can generate any frequency, but if you only
need a very narrow band of frequencies, all that capability
goes to waste.

Rick Karlquist N6RK
(now retired from Agilent/Keysight)


On 12/8/2015 8:32 AM, Attila Kinali wrote:
> Moin,
>
> I've been digging through some stuff and stumbled (again) over Rick's
> paper on high resolution, low noise DDS generation[1] and got confused.
> The scheme is very simple and looks like to be quite easy and reliably
> to implement. If I understood it correctly, the critical points are the
> DDS, its sideband generation and the LO/RF feedthrough in the mixers.
> Nothing that is not known and nothing that is too difficult to handle
> (the 10.7MHz filter get rid of most of the feedthrough already and
> there has been a lot written on how to design DDS for specific applications).
>
> What puzzled me is, why this has not been used more often to correct
> the frequency of OCXOs instead of using some DAC-to-EFC scheme?
>
> Given that Archita Hati et al. were getting very low noise numbers on
> their RF signal generation scheme using dividers [2], I don't think that
> the noise of the mixers would be the limiting factor here, but rather
> that the phase noise should be still dominated by the 10MHz oscillator.
>
> My guestimate is that something like this would cost approximately 5USD
> per divider stage, plus 20 USD for the DDS plus initial mixer. The only
> problem would be to get a narrow band 10.0MHz filter (I couldn't find
> one within 5 minutes of googling). 5 stages should cost around 50-70USD)
> and will give a resolution better than 5uHz (100MHz DDS with 24bit)
> down to 20pHz range (100MHz DDS with 32bit), which are 1:5e-13
> and 1:2e-15 respectively.
>
> Compared to an EFC system that costs somewhere in the range of 10-50USD
> and gives a resolution of something between 1:5e-12 (0.3ppm tuning range,
> 16bit DAC) and 1:1e-13 (10^-7 tuning range and 20bit DAC). Especially the
> 20bit DAC version gives a lot of electrical problems, starting from the
> stability of the reference, leakage current trough various components and the PCB etc pp, while the DDS scheme, as a "digital" scheme is virtually free
> of those.
>
> So, the DDS scheme is easier to reproduce, more stable over time and
> costs only slightly more (unless you try to use an LTZ1000 as reference,
> then the reference alone costs more then the whole DDS scheme).
>
> So, what did I miss? Why do people use DAC-EFC control instead of
> the DDS scheme?
>
> 			Attila Kinali
>
> [1] "A narrow band high-resolution synthesizer using a direct digital
> synthesiser followed by repeated dividing and mixing", Richard Karlquist, 1995
> http://www.karlquist.com/FCS95.pdf
>
> [2] "State-of-the-Art RF Signal Generation From Optical Frequency Division".
> by Hati, Nelson, Barnes, Lirette, Fortier, Quinlan, DeSalvo, Ludlow, Diddams,
> Howe, 2013
> http://tf.boulder.nist.gov/general/pdf/2646.pdf
>