[time-nuts] homebrew counter new board test result

[Charles Steinmetz]

Magnus wrote:

>A bit of hysteresis can help to avoid flipping back, but considering the
>type of signal, it passes the mid-point (0 V) at highest slew-rate, so
>there is very little risk of flipping back and fourth in the first
>place, so hysteresis may not even be needed.

A 1 Vrms, 10MHz sine wave has a zero-cross slew rate of 88v/uS 
(88mV/nS).  One would think that would be enough to avoid indecision 
in a comparator with 5-10nS of propagation delay.  However, the 
LT1016 (10nS) is prone to jitter problems when operating as a ZCD 
with such a signal, and external hysteresis does not help much 
because it is delayed by 10nS.  (The problem appears to be that the 
front end has some indecision at this input slew rate that happens 
faster than the propagation delay to the output -- but this is just 
an inference because the internal nodes are not accessible for 
measurement.)  For this application, the small amount of internal 
hysteresis of the LT1719 and LT1720 is very beneficial.

Best regards,

Charles