[time-nuts] Using CPLD/FPGA or similar for frequency divider

David C. Partridge david.partridge at perdrix.co.uk
Mon Jun 8 11:27:26 EDT 2015


I'm up for either ...  My thoughts are to try it out on a development board and if it works, maybe build a few for possible sale, and also release Gerbers and VHDL files.

Regards,
David Partridge 
-----Original Message-----
From: time-nuts [mailto:time-nuts-bounces at febo.com] On Behalf Of cfo
Sent: 08 June 2015 15:09
To: time-nuts at febo.com
Subject: Re: [time-nuts] Using CPLD/FPGA or similar for frequency divider

On Sun, 07 Jun 2015 11:23:40 +0100, David C. Partridge wrote:

> My reading so far of what's been said in this thread is that you might 
> get good results using a CPLD/FPGA as a divider but ... .
..
..
..
> Thanks again Dave

Is this going to be an "open source" project, or something you buy  ?

CFO

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