[time-nuts] Divider circuit for Rubidium Standard

Charles Steinmetz csteinmetz at yandex.com
Sat May 23 04:37:43 UTC 2015


Bob wrote:

>The simple answer is that a biased fast CMOS gate will do a better job
>ADEV wise than your signal sources will.

Maybe or maybe not, at tau ~1 second.  Trouble is, as tau gets 
larger, the gate performs *worse*.  The switching threshold of all 
MOSFET logic devices varies all over the place with temperature and 
supply voltage as well as random drift.  At tau >10 or 100 seconds, 
these effects become more and more pronounced and xDEV gets worse, 
even if you take pains to keep the circuitry out of drafts.  Gates 
are not a good way to square sine waves if you care about stability 
at longer tau.

Most of what has been said against comparators on this thread are 
indictments of mistakes made in applying them, NOT deficiencies of 
comparators per se.  I don't have the time nor energy to go into it 
in any depth right now, but: Properly applied, comparators can work 
better than pretty much anything else when the job is squaring a 1 to 
100 MHz sine wave.

A few "Do's" and "Do not's":

Do use a comparator with split supplies for the input section, so you 
can use actual ground as the reference voltage.  Do not use inputs 
biased to mid-supply.  Most especially, do not use separate voltage 
dividers to bias the two inputs, because the divider noise is 
uncorrelated and adds.  If you must use inputs biased to mid-supply, 
use one good, low-noise voltage reference (LM329 or LM399) to bias 
both inputs so the bias noise is low and is common-mode (make sure to 
keep the time constants equal at the two inputs).  But just don't use 
inputs biased to mid-supply in the first place.

Do use a comparator with properly-designed internal hysteresis of a 
few mV (e.g., LT1719).  Do use a good, modern comparator (again, 
e.g., LT1719) that was designed since chip-level thermal flow 
analysis became standard practice, to avoid the mysterious drift, 
instabilities, and metastabilities that comparators from the bad old 
days (mid-'90s and earlier) were famous for.

Do not rely on a comparator to work with inputs from mV to 10s of 
volts.  You wouldn't expect that with a logic gate, why in the world 
would you expect it with a comparator?  Adjust the input level with 
amplifiers or attenuators to the optimum value for the comparator you 
are using at the frequency you are operating.

A 5 or 10Vp-p sine wave at 10MHz slews fast enough at zero-cross not 
to need bandwidth-limited clipping amplifiers (a la Dick and 
Collins).  Those techniques were designed for squaring 
audio-frequency sine waves, such as the mixer output(s) of a single- 
or double-mixer system.  If you feel the need, you can increase the 
zero-crossing slope of the input signal by starting with a larger 
input signal than is optimum for the comparator in use and using 
diode clamps to limit the peak amplitude.

There are many other best practices, but the ones above are enough to 
avoid the major application mistakes and have a reasonable chance of 
designing something that works to a high standard.

Best regards,

Charles






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