[time-nuts] FE-5680B Rubidium and DDS

[Bryan _]

Hi Clint:
Looks like we have the identical board. I suspect the XC9572 is turning off the 10Mhz, although why would it wait for 6 seconds?. And as you say it's not related to the "lock" . Here is a schematic I found for a FE-5680A. 
http://www.rhodiatoce.com/pics/time-nuts/FE-5680A/FE-5680A_schematics_v0.1.pdf
I also note the same strange chip in the middle of the absent Max233, wonder if it is some type of optoisolator to protect inputs/outputs?Although not sure why one would be needed if the MAX232 is unpopulated. 

-=Bryan=-

> Date: Tue, 29 Sep 2015 15:41:37 +0100
> From: cjaysharp at gmail.com
> To: time-nuts at febo.com
> Subject: Re: [time-nuts] FE-5680B Rubidium and DDS
> 
> I've made some investigations and re-confirmed my earlier findings on the
> FE-5680B I have.
> 
> It locks from cold in under five minutes and runs at approximately 700mA
> steady with the expected PPS signal on the output connector when locked.
> 
> The particular 5680 I have has a Hi Density 15p male connector on the
> output and uses a single 15V supply, part number FE5680B UN 77672.
> 
> The device does not have the optional DDS daughterboard which means that
> it's not usable as a programmable signal source as it stands (but see
> later).
> 
> For approximately six seconds after power is applied a 10MHz signal
> available on the output connector, this signal comes directly from the
> XC9572 CPLD via a filter network and appears to be a clean sine wave.
> 
> The 10MHz signal seems to be 'switched off' by some event in the unit, I
> don't yet know if this is in response to an event or just a timed shutdown
> but power cycling the unit re-enables the 10MHz output for a further six
> seconds. It doesn't appear to be related to rubidium lock as it takes
> consdierably longer than six seconds to lock.
> 
> There is a solid 30MHz signal inside the unit, stable once the rubidium has
> locked and the PPS output is also available once locked.
> 
> Other observations show that the MAX3232 serial driver chip is missing and
> in it's place there is a tiny 8 pin device marked M09 or MO9 which is
> connected to the TXD/RXD pins on the output connector and the TXD/RXD pins
> on the 80C323 CPU.
> 
> I'd be very interested in suggestions as to the part number of that device,
> it may yield clues as to the communication method needed.
> 
> Attempts to communicate with it via a terminal program have given no
> responses at several 'standard' baud rates. Voltage levels are LVTTL.
> 
> I'm wary of applying 5V to any of the pins on the interface connector
> directly and probing them with 3.3v via a 10K resistor has made no
> difference to any of the signals I can monitor (30MHz, PPS etc.) with the
> exception of pin 13 which I *think* is reset, obviously this causes the
> frequencies to skew for a few seconds until reset is completed.
> 
> My intent is to use the 30MHz signal from the CPLD to clock a DDS chip
> (probably one of the eBay DDS modules) that's controlled by a PIC chip (I
> already have code to run a DDS VFO I developed earlier this and late last
> year. Hopefully this will be small enough to fit inside the casing though I
> don't see a problem with bringing the 30MHz signal out if necessary.
> 
> My apologies if this is outside of the scope of this list, I will also be
> writing up my findings and experiments with this standard on my blog if
> anyone is interested?
> 
> 
> 
> On 26 September 2015 at 11:23, Bryan _ <bpl521 at outlook.com> wrote:
> 
> > Thanks Hal, that's interesting, will try and see how far I can get.
> > -=Bryan=-
> >
> > > To: time-nuts at febo.com
> > > From: hmurray at megapathdsl.net
> > > Date: Fri, 25 Sep 2015 23:40:40 -0700
> > > CC: hmurray at megapathdsl.net
> > > Subject: Re: [time-nuts] FE-5680B Rubidium and DDS
> > >
> > >
> > > > I as well wish there was a quick way of converting it back to 10Mhz. I
> > am
> > > > sure it can be done, just not sure how or where to look
> > >
> > > If the 10 MHz is visible for a second or two, there is probably a gate to
> > > turn it on/off.  If I wanted 10 MHz, I'd open it up and trace the wire
> > back.
> > > If it goes to a gate, you might be able to lift the pin for the other
> > input
> > > and wire it hi/low.  There is a good chance it goes to a FPGA where you
> > can't
> > > get at the gate.
> > >
> > >
> > >
> > >
> > > --
> > > These are my opinions.  I hate spam.
> > >
> > >
> > >
> > > _______________________________________________
> > > time-nuts mailing list -- time-nuts at febo.com
> > > To unsubscribe, go to
> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> > > and follow the instructions there.
> >
> > _______________________________________________
> > time-nuts mailing list -- time-nuts at febo.com
> > To unsubscribe, go to
> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> > and follow the instructions there.
> >
> 
> 
> 
> -- 
> Clint.
> 
> *No trees were harmed in the sending of this mail. However, a large number
> of electrons were greatly inconvenienced.*
> _______________________________________________
> time-nuts mailing list -- time-nuts at febo.com
> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.