[time-nuts] Shera revisted

[Chris Albertson]

Thanks for pointing out the Zynq.  Wow you get a dual core ARM and an
FPGA all in one package.   It seems overkill for a GPSDO but not the
type you are making as you can transferring the time out of the GPSDO
using PTP.

The Zyng looks to the the perfect platform for low-cost SDR.

On Wed, Aug 10, 2016 at 2:30 PM, Joakim Langlet
<joakim.langlet at seaview.se> wrote:
> Dear time-nuts,
>
> My name is Joakim Langlet (SM0OET) and I just recently joined this list. As
> Brooks Shera was mentioned, I remembered that I was referenced in the
> footnotes of the original article in the QST - July 1998. It feels almost
> historical now. Brooks bought a few OCXOs from me.
>
> I am currently working on a GPS stabilized OCXO.
> It is based on a Xilinx Zynq FPGA as the processor and counter arrangement.
> The hardware is starting to take shape. The control voltage of a 20 MHz OCXO
> is set by a DAC coupling from which I hope to set the voltage in very small
> steps.
> The OCXO has a CMOS level output which is converted to LVDS and is wired to
> the FPGA board. The Xilinx Zynq take a minimum frequency of 19 MHz as input
> to the PLL of the clock tile. My intention is to scale up the clock to some
> where a bit over 200 MHz to be fed to the counters.The 1 PPS from the GPS
> receiver is also fed into the FPGA to gate the counters.
>
> The reason for my choice of processor is that I want to run Linux on it in
> order benefit from the large software base. Time distribution using PTPv2
> and a nice web-application to visualize and control what is going on inside
> is part of the intended concept.
>
> I still have a long way to the finish line but I will try to present some
> results as I proceed.
>
> I am following what is written on this list with great interest. It feels
> good to know that I am not the only nut ....
>
> BR/
> Joakim
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-- 

Chris Albertson
Redondo Beach, California