[time-nuts] GPSDO - probably a stupid question.
shalimr9 at gmail.com
Wed Aug 17 21:17:40 EDT 2016
Good point, and an example of how good digital filtering (helped with upsampling) can make the design of the analog filter much easier :)
Reference the digital audio battles of the past century when 1 bit D/As running very fast started replacing the expensive 16 bit audio DACs running at 44kHz.
On August 17, 2016 5:25:39 PM CDT, Magnus Danielson <magnus at rubidium.dyndns.org> wrote:
>There is however a subtle detail, how they leak out over time.
>At one time we had to lock an 155,52 MHz oscillator up to 8 kHz, this
>for a 2,48832 Gb/s link, which needs to pass the SDH STM-16 jitter and
>wander specifications. The first attempt at that PLL was using a 4046,
>and the charge-pump was being used. The charge-pump has dead-time, and
>well, they thought it was good to only push the EFC here and there.
>this meant was that they created a triangle-waved frequency modulation
>of low rate, which then created phase modulations as it went through
>integration of the oscillator. The scale-up factor made this quite
>noticeable at the actual bit-rate. It made the point that you need to
>update often to keep deviations limited, and when doing it at a higher
>frequency, they are easier to filter out.
>In essence, you need to think what each comparison or update creates as
>a step response and how it is averaged out over time.
>In this regard a PWM is a really bad signal, as it can push the
>strongest amplitude at the lowest frequency, which becomes hardest to
>filter. For one design I needed to increase the resolution, so I made
>interpolation but with inversed spectral density to that of PWM, to
>the highest amplitude to the highest frequency so that filtering
>easier. Turned out to be quite easy and work well.
>High update rates can be very useful even if the bandwidth of the loop
>is low. The bandwidth only limits how low the updaterate can be, but
>phase-noise purity makes update rates and smoothing mechanisms
>On 08/17/2016 11:53 PM, Bob kb8tq wrote:
>> You can update the EFC a billion times a second. Update rate and
>bandwidth are not the same thing. If you want good ADEV, the loop
>better not have a bandwidth greater than 0.01 Hz. GPS ADEV is pretty
>awful at 1 and 10 seconds. It is starts to be good past a few thousand
>seconds. Yes, older modules are a bit worse than newer ones. Also
>sawtooth correction can make things a bit better.
>> Sent from my iPad
>>> On Aug 17, 2016, at 2:51 PM, Nick Sayer via time-nuts
><time-nuts at febo.com> wrote:
>>> Updating the EFC more quickly reduces the ADEV, though. I find that
>the fiddly part of tuning a GPSDO design is balancing the ADEV against
>phase control. If you want keep an iron fist on the phase, you can only
>do so by constantly swatting around the frequency.
>>> I won't say that getting more frequent phase feedback is a bad
>thing, but if you're trying to get the PLL time constant to be longer
>rather than shorter that it won't help a lot.
>>> Sent from my iPhone
>>>> On Aug 17, 2016, at 9:57 AM, Peter Reilley
><preilley_454 at comcast.net> wrote:
>>>> You can get crystal oscillators that have a frequency control
>signal and are more
>>>> stable than the run of the mill oscillators. Changing the GPS
>>>> require modifying a very tightly populated circuit board. Perhaps
>>>> What about some of the SDR (software defined radio) projects that
>>>> implement GPS functionality? If you used the GPS chipping rate
>>>> to dicipline the 10 MHz oscillator then you are less sensitive to
>>>> You are updating the crystal one million times a second rather than
>once per second.
>>>> This is assuming that the chipping rate of the transmitter is just
>as good as the
>>>> 1 PPS signal. This info from here;
>>>> and here;
>>>> Even using the 50 bits/sec data rate of the GPS signal would allow
>>>> GPSDO faster than the 1 PPS signal.
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Sent from my Moto-X wireless tracker while I do other things.
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