[time-nuts] Performance of TDC7200

[Li Ang]

Hi
Thanks for the info. The fpga baesed TDC is something I am interested in. However, I am a beginner of fpga programming. Maybe next year I will spend sometime study this project. VHDL is quite difficult for a C programmer :(.  


Regards
Li Ang
BI7LNQ
---Original---
From: "Attila Kinali"<attila at kinali.ch>
Date: 2016/12/16 02:00:32
To: "Discussion of precise time and frequency measurement"<time-nuts at febo.com>;
Subject: Re: [time-nuts] Performance of TDC7200


On Fri, 9 Dec 2016 21:29:34 +0800
"Li Ang" <379998 at qq.com> wrote:

> I've done some tests with TDC7200 and TDC_GP22 few months ago.(https://www.febo.com/pipermail/time-nuts/2016-May/098170.html)

Thanks for the report. It's interesting to see that the TDC7200 performs
slightly better than the GP22.

BTW: If you are using a large FPGA like the EP4CE22, then you might
want to consider using it directly as a TDC. You can fit four ring oscillator
based TDC easily and have more than enough space for your control logic
(we did a 4 TDC system with an NIOS2 core and some glue and still had
space spare).

The bin with is in the order of 22ps, with excursions up to 100ps.

The code we used was based on the tdc-core by CERN[1] and can be found
on my git server [2]. Special thanks to Florian Huemer who got it
working properly.


Attila Kinali

[1] http://www.ohwr.org/projects/tdc-core/wiki
[2] http://git.kinali.ch/attila/nios2_clocksync/tree/master/fpga/cores/tdc

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