[time-nuts] OCXO Retrace

[Charles Steinmetz]

Bob wrote:

>I've noticed that a few of these OCXOs continue to retrace upwards 
>in DAC movement, even after a number of days.  I haven't run any of 
>them for more than a week, as I've built only a limited number of 
>these units.  The normal situation is to retrace downward from the 
>start, once initial warmup is over.

There are several factors that could conceivably affect this.  First, 
some OCXOs have a positive EFC coefficient (higher EFC voltage 
produces higher frequency), while others have a negative EFC 
coefficient (higher EFC voltage produces lower frequency).  It all 
depends on how the varactor is hooked up internally.  For example, 
the internal Trimble OCXOs in Thunderbolts and HP 10811s have 
opposite EFC polarities.

Of course, if you design a PLL that generates a more-negative EFC 
voltage when the OCXO is high (i.e., it expects an OCXO with a 
positive EFC coefficient), and then install an OCXO with a negative 
EFC coefficient, the loop will be unstable and will eventually 
saturate the EFC loop at one or the other of its limits with the 
oscillator way off frequency and the loop unlocked.  If you didn't 
wait long enough for the loop to reach a steady state, it is possible 
that you have some OCXOs with positive EFC coefficients and some with 
negative EFC coefficients.  [1]

If you are sure that all of the OCXOs have the same EFC polarity, you 
need to distinguish two phenomena -- warmup, and retrace.  Obviously, 
when an OCXO is cold it will be pretty far off frequency (typically, 
parts in E6), and as it warms up it will approach its nominal 
frequency.  Whether it is low or high when it is cold (and by how 
much) depends primarily on the crystal cut (assuming that the oven 
temperature is set to the crystal's turnover or minimum-tempco 
temperature).  So, if you are talking about the time between power-on 
and being fully warmed up, the direction and amount of drift is 
probably mostly a function of the crystal cut.

Once the crystal is fully warm, it will be in the "retrace" regime -- 
essentially, accelerated aging to reach its new, stable 
frequency.  This can be in either direction, without regard to 
crystal cut.  Some crystals will settle very, very close to their 
last stable frequency, others not so much (and the difference can be 
either + or -).

[1]  One final point on OCXO EFC characteristics:  Each OCXO has an 
EFC "gain," expressed in Hz/V, which is one of the factors in the 
open loop gain of the PLL control loop.  If you install an OCXO with 
higher EFC gain into a PLL that is compensated properly for an OCXO 
with lower EFC gain, you are very likely to make the control loop 
unstable (or, at least, conditionally stable), which could make the 
DAC voltage do strange things.

Best regards,

Charles