[time-nuts] DMTD - analog multiplier vs. diode mixer ?

Attila Kinali attila at kinali.ch
Sun Jan 10 13:56:35 EST 2016


On Sun, 10 Jan 2016 14:30:41 +0100
Magnus Danielson <magnus at rubidium.dyndns.org> wrote:

> > SR-flipflop? Are you refering to the JK-FF phase detector or the PFD?
> 
> A straight SR-flipflop. I would have written JK-FF or PFD if I meant it.
> Also, as I mentioned the PFD directly after, you could have concluded 
> that was not what I intended.
> 
> A SR-flip-flop with no illegal input states is easy to build from a 74HC00.

The illegal input states were my concern, indeed. And a quick google
didn't show up anything to disperse these....not until I started reading
the 4046 datasheet in detail. 

But there is one thing about the arangement of the SR FF in the 4046[1]
that bothers me:
Although S = R = 1 is valid, it does lead to the output oscillating
between 0 and 1.


			Attila Kinali


[1] Ti CD74HC4046A Datasheet
http://www.ti.com/lit/ds/symlink/cd54hc4046a.pdf

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