[time-nuts] Generating a solid PPS from 10Mhz source
kb8tq at n1k.org
Thu Jan 21 07:43:31 EST 2016
> On Jan 21, 2016, at 5:48 AM, Attila Kinali <attila at kinali.ch> wrote:
> On Wed, 20 Jan 2016 17:56:31 -0500
> Bob Camp <kb8tq at n1k.org> wrote:
>>> Interestingly, some were close to 0ps, for which
>>> we have no good explanation.
>> The explanation is fairly simple, you have a clock and a “data pulse”
>> flying down the delay / carry chain. With an ASIC you could make sure they
>> take a very linear route through the silicon. With a FPGA you can’t do that.
>> Both are routed through this and that.
> We placed the delay line manualy and run the calibration loop of the
> OHWR TDC. Which does a histogram over all bins excited with a (hopefully)
> uncorrelated ring oscillator. We tried both the OHWR temperature to binary
> encoder and a "count all zeros/ones" version. Both showed the same behaviour,
> ie that some bins hardly see any hits. Yes, i would expect this kind of
> thing in general, due to the layout/routing of the wires in the FPGA. But
> I would expect it to have some kind of regularity, a kind of pattern in the
> distance between these un-excitable bins. But there is none. That's why I'm
> saying we have no good explanation for it.
That was my conclusion about manual routing. You still have the same “gaps”
as autoroute. There obviously are variations in the cells that are not visible from
a macro level view. Given the fine detail involved, that’s not a major surprise. They
are packing stuff in there mighty tight. A 10% variation in this or that probably scores
as “that’s fine” process wise. It’s certainly fine in terms of off the shelf digital logic.
For a TDC that’s probably not a “that’s fine” on some parameters.
Consider the voltage threshold that the logic decides is a one vs a zero. On off the
shelf logic that’s a 20% to 80% sort of spec. It may be more consistent than that, but
they spec it that way. All of your clock and data signals are slew rate limited. A variation
in logic threshold will ultimately come up as a timing issue. There are many things like that
in there ...
> We have not had the time to analyze the routing in detail to see whether
> there is anything fishy there. I will try to squeeze that in, if possible.
> Attila Kinali
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