[time-nuts] HP5370B & HP5345B Front-End IC Redesign Effort

Bruce Griffiths bruce.griffiths at xtra.co.nz
Mon Jan 25 06:36:18 UTC 2016


I've been considering this for some time.The key is the replacement for the triggered phase locked oscillator based interpolators.
FPGA based TDCs aren't yet quite good enough.
Off the shelf TDC chips are a little better but still fall a little short in performance.

Whilst a TAC approach can achieve around 4ps or so (eg various Wavecrest instruments) a lot of discrete parts are  likely to be required.

My crude testing of a triggered damped sinewave generator sampled by an RF ADC indicates that an event time stamp noise of 5ps or better appears feasible. 

The technique of exciting a high Q saw bandpass filter with an impulse and digitising  the output is probably more expensive and complex than desirable.

Bruce
 

    On Monday, 25 January 2016 6:04 PM, Bob Camp <kb8tq at n1k.org> wrote:
 

 Hi

Since the front end chips are mixed signal ASIC’s, it will take more than a bit of time to 
replace them directly. Re-doing the entire front panel board is the most likely way to “fix”
the problem. The question is - why do that at all? Just do a PC instrument that does the same
thing as the counter with way less effort…..

Bob


> On Jan 24, 2016, at 6:02 PM, Dimitri.p <dimitri at dotp.com> wrote:
> 
> Someday , someone will get bored with everything else and give it a try, you know, in their spare time.
> The time when these counter were new was a long while ago.
> Back then an amplifier chip with 500MHZ BW was a much bigger deal than it is in 2016.
> ...but spare time is permanently on backorder .... :)
> 
> Dimitri
> 
> At 06:15 AM 1/24/2016, Bob Camp wrote:
>> Hi
>> 
>> Back when these counters (5345, 5370, 5335) all were new, the inputs were
>> the weak link on all of them. There were known âdonât do thatâ things on the line
>> that would blow out each of them. Regardless of the level of care and yelling, inputs
>> blew on a fairly regular basis. Probably 10% of the counters went back
>> for repair over a 5 year period. It was always a âswap out the entire boardâ sort
>> of repair and never was under $1K. We regularly spent the price of a new counter
>> each year on repairs. If there had been an easy way to fix them,  (or even to just
>> pay $500 for the chip) we would have done it.
>> 
>> Bob
>> 
>> > On Jan 24, 2016, at 8:34 AM, Dale Cannon <dalecan1 at cfl.rr.com> wrote:
>> >
>> > Funny,
>> >
>> > A friend asked me if I could replicate the front end for a 5370A, a many
>> > years back. I related to him that replicating the input chip was not a
>> > trivial task. His 5370A had been used (by someone else) for direct testing
>> > of controlled-motion DC motors and the front end had obviously been
>> > overstressed by voltage spiking. At the time, I had considered replicating
>> > the front-end probe circuit of a K100D logic analyzer: FET diff. pair
>> > followed by an ECL 10216 line driver. Obviously most daughterboard or dead
>> > bug modification approaches have downsides; in the end I just couldn't cut
>> > up the HP front end and told him to search for a more qualified repair
>> > facility.
>> >
>> > BAMA boat anchors has the K100D manual and probe schematic.
>> >
>> >              Dale Cannon  KS4FA
>> >
>> >
>> > -----Original Message-----
>> > From: time-nuts [mailto:time-nuts-bounces at febo.com] On Behalf Of Mathew
>> > Breton
>> > Sent: Friday, January 22, 2016 5:15 PM
>> > To: time-nuts at febo.com
>> > Subject: [time-nuts] HP5370B & HP5345B Front-End IC Redesign Effort
>> >
>> > I was gifted an HP 5370B with the usual problem: front-end problems,
>> > probably due to overstress. It is currently up and running again with a set
>> > of 5345A series A3/A4 boards as I wasn't able to get a cheap pair of
>> > 5088-706x hybrid ICs.
>> > This sounds like a common problem. As a result, I'm designing an open-source
>> > drop-in (hopefully) replacement. My hat is off to the original IC designer,
>> > as it is not a trivial effort due to the wide input signal common-mode
>> > range, and very tight trigger timing requirements. Other items (like the
>> > E-ECL) output) are also adding a bit of extra effort.
>> > I'm hoping that someone(s) might be interested in working with me on it. I
>> > would like to have my assumptions and math checked before I start the
>> > detailed design phase, and perhaps contribute some better ideas.
>> > In addition, it would be really helpful if someone could run a few rise-time
>> > dispersion tests on an instrument with a working "B"-series A3/A4 PCB set
>> > (my unit obviously doesn't qualify).
>> > Regards,
>> > Mat Breton
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