[time-nuts] The home time-lab

David davidwhess at gmail.com
Mon Jul 25 01:36:22 UTC 2016


Are there some reference designs you can point to where this is a
problem?

Because all of the application notes and references designs I have
checked so far have no requirements for input wave shape other than
peak and to a lessor extent RMS voltage.  The input power factor
degrades with inputs which have higher frequency content but the
converter should not fail.

The input after the bridge rectifier is sampled by one control loop
which adjusts the duty cycle so that the input current is proportional
to input voltage (resistive) while a second slower control loop
adjusts the average input power to roughly regulate the output
voltage.  The output voltage ripple mimics the input voltage waveform
for practical reasons.

If PFC power supplies have an issue with modified sine inverters, then
that would be a pretty big problem given how common they are.

On Mon, 25 Jul 2016 00:51:36 +0000 (UTC), you wrote:

>The PFC stage needs a line frequency sinewave reference, if this is produced by attenuating the line input, then it may not function well with badly distorted line input waveforms (modified sine, square wave etc).Phase locking a sinewave to the line input may be a better approach.
>Bruce



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