[time-nuts] Microchip PIC CTMU

David davidwhess at gmail.com
Fri May 13 15:30:17 UTC 2016


Based on my earlier experiences with pattern dependant jitter caused
by interaction between different logic circuits, a few hundred
picoseconds is about what I would expect if an FPGA (or
microcontroller) is controlling the charge cycle timing.  I would be
surprised if the PIC CTMU cannot achieve that unaided with careful
design.

On Fri, 13 May 2016 07:36:10 -0400, you wrote:

>Hi
>
>Given that a “real” TDC is a resistor and capacitor attached to a FPGA pin (plus the ADC)
>the cost of doing it better is not all that much. You can get down to a few hundred ps without
>a lot of crazy effort ( still using the MCU ADC).  
>
>Bob



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