[time-nuts] Commercial software defined radio for clock metrology

[Attila Kinali]

On Sat, 28 May 2016 12:08:18 +1000
Michael Wouters <michaeljwouters at gmail.com> wrote:

> I also have been looking at low-cost SDR hardware for T&F measurements
> and have made an RF phase meter based on the Red Pitaya. The
> performance of this was not as good as I was hoping for: the
> fractional frequency resolution of this is about 10E-12 at 1 second
> averaging time. An earlier implementation on fairly ordinary NI
> hardware (14 bit 100 MHz ADCs) did better than 10E-13. Part of the
> problem seems to be that although the RP ADC is 14 bits, the effective
> number of bits is really only 10, according to a study I read (ENOB
> for the NI ADCs is specified as 12). The RP is a bit constrained for
> DSP resources too - it was a struggle to squeeze in the decimation
> filters.

This does not really surprise me. The Red Pitaya has not been done
by someone who knows how to do a low noise design.

Unfortunately, there are no schematics of the board available
(why someone would keep these secret when everything else is
open source is beyond me), but from what is known:
A dual 14bit 125Msps ADC (LT2145) that are fed by an Opamp
(seems to be an LTC6403) to get a differential signal out of
the signle ended input. There is an quite high impedance input
divider stage (500k to 1M resistors!).

But the biggest problem of the board is, that the ADC is right
next (as in ~2mm distance) from the Zynq FPGA+CPU SoC.
No matter how well you "shield" the ADC, this alone will eat up
quite a bit of the ADC's performance.

As for the FPGA size, it's supposed to be a 17k LUT type. It's not
the biggest FPGA on the market, but that should be quite a bit of
resources. So I am a little bit surprised that you had trouble to
fit in the decimation filters. As we are doing a similar desgin
also using a Zynq 7010 I would appreciate if you could elaborate
a bit what made the FPGA too small for your application. As this
would mean that we have to potentially redesign the board.


			Attila Kinali

"schematics" (aka extended block diagram) of the red pitaya prototype:
https://dl.dropboxusercontent.com/s/jkdy0p05a2vfcba/Red_Pitaya_Schematics_v1.0.1.pdf

Close up pictures:
http://imgur.com/a/AuYWf


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