[time-nuts] 1PPS to 32.768 khz

Chris Albertson albertson.chris at gmail.com
Thu Oct 20 03:40:53 UTC 2016


I think the suggestion to simply blast out 32768 pulses once per second at
a fast rate of (say) 40kHz is the simplest yet and VERY close to what the
OP asked for.   This makes the average frequency near perfect but of cours
with HORRIBLE phase noise but the OPonly cares about average frequency.

It would be VERY easy to program a small micro controller to output 32768
pulses on an output pin whenever a PPS is detected on an input pin.    I
could implement this in a bare 8-pin AVR chip in about 15 minutes.    The
chip would only need 5 volts power and ground.  The 32KHz signal would have
very poor short term characteristics but who cares?

I was about to write that is is theoretically impossible to create 32kHz
from 1Hz (PPS) and I stick by that.  (but notice in the above we don't
create 32kHz  we just output a fixed number of pulses that have some
imprecise timing then wait for the nest second "tick".

Back to creating 32K for 1Hz.  It is impossible, even in theory.  The best
you can do is output a signal you hope is very close to 32kHz, measure it
relative to the 1PPS reference then adjust it to make it closer to 32kHz
and keep on adjusting it every second.  It will never be perfect.

But the crude 8-pin AVR chip would be as good as at the 1PPS reference,
better on average then any GPSDO.





On Wed, Oct 19, 2016 at 8:07 PM, David <davidwhess at gmail.com> wrote:

> I was thinking 32.768kHz VCXO and phase detector to make a simple
> analog PLL.  I found a datasheet for a suitable VCXO and assuming a
> total error of 20ppm, it would only need to be divided by 2 to prevent
> locking to the wrong frequency making an analog PLL pretty simple.
> Safer to divide by 4 or 16 of course.
>
> But I wonder if a microcontroller using a 32.768kHz external clock
> could be the phase detector itself.  Strobe the microcontroller ADCS
> from the 1 PPS to sample the sine 32.768kHz clock, simmer, and serve.
> Or just count cycles to make a FLL.
>
> The most annoying thing about using a varactor for tuning is that they
> are not amendable to low drive voltages.
>
> On Wed, 19 Oct 2016 18:14:32 -0400, you wrote:
>
> >Hi
> >
> >As has been already mentioned, a lot depends on what you have. The drop
> dead cheapest way to do it:
> >
> >Start with an MCU with an internal oscillator. There are *lots* to pick
> between. Which sort really does not matter.
> >For example, I’ll use one that starts at 4 MHz.
> >
> >Divide the 4 MHz down to 32,768, or as close as you can get. The common
> clocks aren’t going to divide
> >straight to 32768 so you will need to do two divides. One will be a bit
> fast, the other a bit slow. You flip between the
> >two in a fixed pattern to get the result to average out correctly.
> >
> >Next take the same 4 MHz and run a counter /timer off of it. Capture the
> pps edge with the timer. It will drift
> >a bit since the clock in the MCU is not perfect. Based on the drift,
> modify your dividers to correct the outcome.
> >If you are “good” to 1 part in 32,768 in each second, that’s close enough
> for a wall clock. You will have no net
> >error long term if you do it right.
> >
> >That’s all a sub $1 solution….
> >
> >Bob
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-- 

Chris Albertson
Redondo Beach, California



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