[time-nuts] WWV receivers?

Poul-Henning Kamp phk at phk.freebsd.dk
Sat Oct 29 11:59:17 UTC 2016


--------
In message <20161029134952.e60a2182e1f53844ec50bb0b at kinali.ch>, Attila Kinali writes:

>> nsayer at kfu.com said:
>> > That single-chip version is going to have a *LOT* less (and less variable)
>> > latency than an SDR. 
>> 
>> Latency isn't an issue as long as it is known so that you can correct for it.
>> 
>> Has anybody measured the jitter through SDR and/or tried to reduce it?  I'd 
>> expect that even if you counted cycles and such there would still be jitter 
>> from not being able to reproduce cache misses and interrupts.
>
>Should not be too high.

It should be nonexistent.

The sensible way to do SDR-timing, is to capture a signal from the disciplined
oscillator with the ADC samples, so that their precise timing relationship is
firmly bolted down.


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Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
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