[time-nuts] 10MHz to 25MHz

David davidwhess at gmail.com
Thu Jan 19 13:40:07 UTC 2017


On Wed, 18 Jan 2017 21:06:04 -0800, you wrote:

>On 1/18/2017 6:34 PM, David wrote:
>
>> An alternative very simple design I might try is a variation of the
>> active frequency multiplier where the 5th harmonic is filtered
>> directly from the output of the digital divide by two stage.
>
>That's a useful trick to reduce the filtering burden.  Having said
>that, if you need good spectral purity, the filtering is still
>going to be very non-trivial.  The original poster is obviously
>not an expert in filters and will not be successful trying that
>approach, except for very low performance design.  Even if
>you are a filter expert, components are hard to get.
>
>Rick N6RK

I only suggested it because Loren seemed dead set on a harmonic
frequency multiplier.  The output from a digital logic gate will
already have a strong 5th harmonic so no extra passive or active
harmonic generating stage is needed.  The document I linked discusses
the filtering requirements like notching out the strong 3rd harmonic.

If spectral purity is important, then this is the wrong way to go
about it; it would be better to phase lock a separate crystal
oscillator.  In some applications I would also be concerned about the
phase of a narrow bandpass filter changing with temperature.



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