[time-nuts] time/sampling behavior of RTL-SDR
jimlux at earthlink.net
Tue Mar 7 16:08:17 EST 2017
Has anyone ever looked at the timing consistency/behavior of the cheap
That is, if you feed a sine wave in and get the samples out via the USB
interface, are there missing samples? What's the ADC clock look like?
If you had two of them, and you determine the relative phase of them at
some time t0, and you let it run for minutes, how far will it have moved?
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