[time-nuts] PLL Digital Loop Filter

[James Peroulas]

I'm trying to understand how to design and analyze the loop filters in a
digital PLL. Specifically, because of digital processing delays, the phase
offset measured at time t will only produce a change on the VCXO input at
time t+T, where T is the sampling period of the digital loop.

I've found plenty of texts describing analog loop filters. Are there any
recommendations for digital loop filter PLL design?

Thanks,
James