[time-nuts] PLL performance?

[Tom Van Baak]

Hi Scott,

That's a nice project.

Combining quartz and pendulum like that is essentially how a GPSDO works. In your case, instead of a 10 MHz oscillator you have a 1 MHz oscillator and instead of 1PPS you have 1/2 PPS. Whether you use an analog loop or a digital loop there are dozens of examples on the web and hundreds of time-nuts postings that cover this territory.

Note that you have a choice of using the hp 107a quartz oscillator to discipline the pendulum, or use the pendulum to discipline the quartz. Each project has a certain charm.

Your decision to use a 32-bit time stamping counter (TSC) is good. Pendulum clocks tend to be less accurate than quartz oscillators and so they tend to "wrap" more often. A TSC avoids the zero boundary, sign, and sample rate issues that can plague a traditional start/stop, aka time interval counter (TIC).

A standard deviation of ~50 counts out to 10 million counts over a day represents a consistency or stability of 50 / 1e7 or 5e-6 or 5 ppm at "tau" 1 day. I would guess the shape of your Gaussian merely reflects the loop parameters you have chosen, and not so much the quality of the 1 MHz quartz or the 0.5 Hz pendulum. For example, tighten the loop and I bet your histogram will narrow.

I'm not sure of your terminology -- at one point you mention 1 MHz, then mention 10,000,000, then mention 10e6, which some people might read as 10^6 as in 1,000,000 or 1e6 and others may read as 10x10^6, as in 10^7 or 10,000,000 or 1e7.

Either way, this level of performance for a hp 107 oscillator or for a pendulum clock seems right. I don't think there's any problem with your setup. Pendulum clocks can easily get to ppm levels; some even get to ppb levels.

One suggestion is for you to make several runs against an independent reference: 1) hp 107A only, 2) pendulum only, 3) hp 107A and pendulum with PLL. When you see these ADEV plots you will get a hint of how the PLL should be tuned. Here's a classic example:

http://www.thinksrs.com/assets/instr/PRS10/PRS10diag2LG.gif

Some additional GPSDO, pendulum/PLL, pendulum ADEV links:

http://leapsecond.com/pages/gpsdo/

http://leapsecond.com/hsn2006/

/tvb


----- Original Message ----- 
From: "David Scott Coburn" <scotttt at optonline.net>
To: <time-nuts at febo.com>
Sent: Monday, March 20, 2017 6:07 PM
Subject: [time-nuts] PLL performance?


> Hi All,
> 
> I have built and tested a PLL circuit that will be used to generate a 1 MHz signal locked to a 0.5 HZ signal from a pendulum.  (Details available upon request.)
> 
> The circuit is a classic 4046 generating the 1 MHz signal which is fed into a 2e6 digital divider which outputs 0.5 Hz which is fed back to the 4046 phase comparator (PC).
> 
> I take a 1 MHz signal from an HP 107A run through another 2e6 divider to generate a reference 0.5 Hz signal for the other 4046 PC input.
> 
> I tested this by feeding the 0.5 Hz output of the PLL into a "time-stamp counter" board which I built to go into an HP 3582A Data Acquisition unit.  The TSC uses the 5 MHz signal from the HP 107A to feed a free-running 32-bit binary counter.  The 0.5 Hz input latches the count value (on the rising edge of the signal), which is then logged.
> 
> See the attached diagram.  The PLL under test is in the red box.  (Not sure what the policy is here for attachments?)
> 
> If all was perfect I would get a string of values of 10,000,000 counts each, one every 2 seconds.
> 
> Over the course of one day the average reading is, in fact, 10e6, so the PLL looks to be working over "long" time scales.
> 
> The attached histogram plot shows the actual data for the 0.5 Hz signal, showing the distribution of deviations from 10e6 counts.  This is almost a full day of data, about 40,000 readings.
> 
> The standard deviation for the data is about 55 counts.
> 
> The plot looks to my eye to be a nice Gaussian shape, so I assume that the deviations are caused mainly by (white?) noise.  There does not look to be much other structure in the shape of the data.  (Comments welcome.)
> 
> Sorry for the long introduction, there are some questions coming!
> 
> I have looked for information on the web about others who may have done this kind of PLL, but did not find much.
> 
> Does anyone know of any articles related to this?
> 
> If so, do you know what kind of performance they got?
> 
> What kind of statement could I make about the 'stability' of this circuit?  Simplistically: a 'stability' of ~50 counts in 10e6 is ~5e-7?
> 
> By the way, this performance is WAY WAY beyond what I was expecting....
> 
> Cheers,
> 
> Scott