[time-nuts] PLL Digital Loop Filter
paulswedb at gmail.com
Thu Mar 23 11:25:59 EDT 2017
This has been a great conversation as I have tinkered with classical
But the fact is with micros so cheap the flexibility they add to the loop
filtering is quite nice. Essentially droop-less filters with silly time
constants and then other math on the data. That may or may-not improve
On Wed, Mar 22, 2017 at 5:51 PM, Bob kb8tq <kb8tq at n1k.org> wrote:
> > On Mar 22, 2017, at 7:50 AM, Attila Kinali <attila at kinali.ch> wrote:
> > On Tue, 21 Mar 2017 21:45:24 -0400
> > Bob Camp <kb8tq at n1k.org> wrote:
> >> 1) You need a way to digitize the phase input with adequate resolution.
> >> you have a 1 second period and want 1 ns, you need a way to digitize at
> >> a 1:1,000,000,000 sort of level. That’s in the 30 bit range so a simple
> >> ADC isn’t going to do it alone.
> > That depends on how the phase difference is measured. If the whole
> > measurement period needs to be encoded, then yes, the number of
> > bits needed will make it difficult. But usually the input frequency
> > range is limited, which allows to measure and encode just the difference
> > between expected and actual arrival time of the pulse/edge. The
> > version of these PLLs (the ADPLL - all digitall PLL), if they have a
> > real TDC, have only a resolution in the order of 7-8 bits (IIRC I've seen
> > down to 4 bits). And then there is the class of those Bang-Bang PLL,
> > which only encode one bit: early/late. Eventhough they are relatively
> > crude and rely on the loopfilter to smooth things out, they perform
> > quite well.
> We started out with an XOR that has a 50/50 duty cycle. An early /late
> process only works if you run the outputs through an ADC and calibrate
> them to some degree. Then you are right back to a lot of resolution time
> > Attila Kinali
> > --
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