[time-nuts] Help improving impedance measurement by having a better clock

Daniel Mendes dmendesf at gmail.com
Sat Apr 7 21:54:42 EDT 2018

I´m a long time time-nuts lurker (I posted here just a dozen times). I make
a few impedance measurement systems for material analysis (i´m a single man
shop doing custom hardware for clients). Usually they´re based around a
STM32F4 / F7 microprocessor: DAC generates sine signal (1-400KHz), ADCs
measure them back, a few calculations later we have modulus / phase. I
always used internal ADCs and DACs (12 bits each).

I now want to use external ADCs and DACs with more bits to push the limits,
but i´m afraid that the poor performance of the STM32 PLL that drives the
clock will get in the way, so I plan to drive the "load" of both DAC and
ADCs from an external signal derived from a TCXO using a clock divider.

To get some sense of how much things are improving (or not) I need to
somehow measure these clocks and get a meaningfull measurement about how
good (or bad) they are.

The tools I have are a Hameg HM8123 with a 10MHz OCXO I shoehorned inside
and a Picotest U6200A with original OCXO. I can log period information from
both using serial/USB port. I can make a histogram of the data. I don´t
have any better idea about what to do and would like to hear from you :)


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