[time-nuts] 4046 replacement
magnus at rubidium.dyndns.org
Wed Apr 18 15:02:09 EDT 2018
On 04/18/2018 03:17 PM, Charles Steinmetz wrote:
> donald wrote:
>> HEF4046BCN`s, but have
>> recently read that this CMOS IC has a design flaw. What would be a better
>> chip to retrofit?
> As Bill said, the HCT9046 is the improved version of the 4046.
> The "flaw" in the 4046 is a dead zone around zero error in Phase
> Comparator 2 (the PC one generally uses).
It is very bad indeed. Someone chose to use the 4046 to lock up a 155,52
MHz VCXO to a 8 kHz reference, using a 4046 as a core. The charge-pump
was then "accelerated" with a supposedly better charge-pump with a ton
of passives. Turns out that the dead-band was still there to haunt the
designers. The 155,52 MHz was further multiplied to become the 2,48832
Gb/s clock, and as they measured this they had problems with the
jitter/wander of it, as they measured on a rented instruments. Then they
called me in for it. I looked at it and could quickly conclude that the
problem was the dead-band, so that the VCXO coasted up and down after
the push in either side due to the deadband, creating jitter/wander
breaking the standard limits. I concluded that a more continuous
approach was needed, and then they went back to the S/R FF I had
originally proposed, which they natually had ignored and overengineered
something else, and well, look and behold it locked and was well within
4046 can be cool and nice little critters, but use them wisely where
they work. I try to steer clear from the charge-pump whenever I can.
> PC2 in the HCT9046 uses
> charge-pump outputs that are biased to avoid the dead zone. It also
> uses an internal voltage reference, rather than fraction-of-Vdd, to
> minimize drift.
I was about to recommend having a look at the HCT4046, HCT7046 and
HCT9046 series, if one needs something in that family.
Rather than doing charge-pump, an op-amp setup for a integrator in a
PI-loop and a reasonable continuous waveform comparator of choice do
really well. XOR, S/R FF or mixer. The more I work on PLLs, the simpler
they become and the robuster they seem to become.
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