[time-nuts] HP 5065A A1 replacement with DDS
attila at kinali.ch
Sun Jun 24 14:00:22 EDT 2018
On Sun, 24 Jun 2018 17:29:43 +0000
"Poul-Henning Kamp" <phk at phk.freebsd.dk> wrote:
> My plan is to replace the entire chain up to the 60 MHz with that
> DDS, and do the modulation digitally, then put one of those
> "geophone/optical" 24bit ADC's on the photo-sensor and close the loop.
I recently thought about that problem and came up with a solution
that might replace more than just A1:
The idea is to use an FPGA (can be a relatively small one) as an I/Q DDS,
then use an I/Q modulator shift the frequency into the right spot
and supressing the mirror. The advantage of using an FPGA instead of
an off the shelf DDS comes from that it makes it possible to connect
an ADC to it, which samples the photo diode voltage and do the demodulation
and integration in the digital domain, thus incuring less noise and zero
drift. Additionally, adding another DAC to generate the 10MHz or any
other frequency directly, gives the possibility to tune the Rb output
in a very wide range without incuring any problems with synthesis chain
and decoupling the reference from the Rb (ie the reference doesn't even
need to be tunable).
Attached is the page of my notebook with the schematic of the idea.
(sorry for the bad handwriting). The components that are not labled
are: PLL: any that can work with the Ref input, e.g. ADF4001.
The VCXO is an ABLJO or any equivalent with 155.52MHz or 156.25MHz.
The divider is a D-FF, either an 74LVC74A or better NB7V52M.
The output frequency of the DDS is in the range of 11-18MHz,
depending on the output frequency and the VCXO frequency.
It is upon moral qualities that a society is ultimately founded. All
the prosperity and technological sophistication in the world is of no
use without that foundation.
-- Miss Matheson, The Diamond Age, Neil Stephenson
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