[time-nuts] 1 pps sync'ing

Chris Caudle chris at chriscaudle.org
Fri Jun 29 09:51:21 EDT 2018


On Fri, June 29, 2018 8:13 am, Martyn Smith wrote:
> My colleague Steve asked a question about wanting to
> generate a 10 MHz and 100 MHz squarewaves with
> both rising edges aligned to a reference 1 pps
> input (to within 5ns).

You say "both," but which edge you pick is a little bit arbitrary since
there are 100 million to choose to align to the PPS.

General approach could be something like this (probably not optimal, but
simple to understand):
100MHz tuneable oscillator -> divide by 10 -> 10MHz
10MHz -> divide by 10M -> 1Hz

So you now have 100MHz, 10MHz, and 1Hz, syntonized since they came from
the same source, but the synchronization is offset by the delay through
the divider chains.
Take the 10MHz and 1Hz signals, and send them to the data input of a D
flip-flop, clocked by the 100MHz, and now the 100MHz, 10MHz, and 1Hz edges
are offset only by the delay through the flip-flop.
You would still have to be careful in part selection, standard CMOS logic
would have several ns of propagation delay, so you couldn't just grab any
random flip-flop and guarantee 5ns edge alignment.

If you want to throw a little money and layout effort at the problem
Analog Devices make a device which specifically advertise as being able to
synchronize clock outputs to 1PPS input:

http://www.analog.com/en/products/clock-and-timing/clock-generation-distribution/clock-synchronization/ad9548.html

http://www.analog.com/en/education/education-library/videos/756421501001.html

That device is basically a DDS based clock generator with digital PLL all
in a single package, so could be more than needed for this task.  I have
not used the AD part personally yet, I noticed it while looking for
something else and thought the fact they specifically pointed out it was
useful for synchronizing to PPS was interesting.

-- 
Chris Caudle







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