[time-nuts] LT1016 as a pulse shaper...

[Bob kb8tq]

Hi

If you are simply dealing with 10 MHz sine waves (as many of us are). 

— and —

It’s a “matched” application ( = you know the level / the source and converter are tied together) 

— and —

You don’t mind an L network to match increase the Vpp when it goes to the gate

— and —

Once the performance of the circuit is better than any source you can drive it with, you 
don’t care. ( = you only care if it degrades the signal) 

You can do a very good job with a biased CMOS gate. Running at 5V (or even better 5.5) 
will out perform 3.3V. They are dirt cheap. They are easy to solder down in SOT-23 packages. 
They are reasonably robust in terms of overload. They perform pretty well when under driven
by modest amounts. They have nice short delay paths.

What’s not to like :)

Bob



> On Mar 3, 2018, at 4:34 PM, Bruce Griffiths <bruce.griffiths at xtra.co.nz> wrote:
> 
> Ideally one should use a Collins style optimised cascade of increasing bandwidth and gain limiting stages. The LTC6957 with its selectable input stage bandwidth has a performance that is comparable with the Holzworth sine to CMOS "amplifier" which is better than any comparator by itself. If the amplitude of the input signal is large enough (i.e. input slew rate seen by the gate is large enough) the performance of a single CMOS gate can be very good. However the performance of current CMOS gates degrades in this application with input frequencies of 100MHz and above.
> 
> Measuring the PN performance of CMOS gates used as sine to CMOS converters is on the todo list.
> 
> Bruce
> 
>> 
>>    On 04 March 2018 at 06:38 "David C. Partridge" <david.partridge at perdrix.co.uk> wrote:
>> 
>>    You might consider using MC74VHC1GT14 or MC74VHC1G14 (Schmitt trigger inverting buffers) depending on the exact voltage levels.
>> 
>>    They are fast (74AC logic fast) single gate devices in SC70 (SOT-353) or SOT23-5 case and can drive 25mA output if needed.
>> 
>>    I've seen documents saying that using fast logic gates can result in lower jitter/phase noise. Bruce - do you know ?
>> 
>>    David
>> 
>>    -----Original Message-----
>>    From: time-nuts [mailto:time-nuts-bounces at febo.com] On Behalf Of Ulf Kylenfall via time-nuts
>>    Sent: 03 March 2018 17:08
>>    To: Discussion of Precise Time and Frequency Measurement
>>    Subject: [time-nuts] LT1016 as a pulse shaper...
>> 
>>    Gentlemen,
>>    I have so far been using LT1016 as a pulse shaper and also whenever I needed toconvert a sine wave into TTL Logic levels. Some hysteresis and all the decouplingand layout precautions as recommended by LT.
>>    Are there any similar or better alternatives out there that could be usedthat would provide lower jitter and that are less expenceive?
>>    Ulf Kylenfall
>>    SM6GXV
>> 
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