[time-nuts] Question about the PLL of Trimble Thunderbold

Magnus Danielson magnus at rubidium.dyndns.org
Thu Nov 1 04:19:26 EDT 2018

Hi Tom,

On 10/31/18 10:45 PM, Tom Van Baak wrote:
>> I have in mind a project which consists in synchronizing two or more stable
>> clocks (OCXO) disciplined by GPS.
>> However, would be great to have the option to disable the GPS on both sides
>> at a given time and to synchronize them in a Master-Slave or directly by means
>> of a protocol they could correct each other and synchronize themselves.
> Given your desire to synchronize the clocks at picosecond levels consider using 10 MHz instead of 1PPS. What you are designing then is just a very tight PLL to keep the oscillators in sync. Leave GPS and 1PPS out of the equation; just focus on the RF signals. Once you have meet your 100 or 10 or couple of ps goal then adding the coarse timing is quite simple. There are several ways to do the UTC/1PPS part:
> 1) Out of 10 million cycles you pick the cycle that's closest to your best GPS/1PPS. And then steer the synchronized OCXO by +/- 50 ns to match GPS. I don't know how happy the PLL will be sliding 50 ns when it is designed to lock within ps, but I'm sure that's a solvable problem.

Phase-jumping to the nearest transition is the first trick in the bag.
It saves significant amount of time, seems obvious but it is part of the
lock-in procedure of phase.

The trick used then is to separate general lock-in from precision
lock-in. By starting in a wide bandwidth, the general lock-in goes very
quickly, and then to move to a more tightly locked state, one steps to a
tighter bandwidth. This can be done with one or more intermediate steps
for stepwise refinement.

> 2) Out of 10 million cycles you pick the cycle that's closest to your best GPS/1PPS. And then just record the +/- 50 ns offset as data and send it over a serial port to the other oscillators in your ensemble.
> The point is there are two ways to do timing. The hard way is to generate 10 MHz and 1PPS signal that is exactly UTC. The easy way is to generate 10 MHz and 1PPS along with a message telling you what the offset is (or was). It's similar to how saw tooth correction is done; you don't need an exact on-time pulse as long as you are given information to calculate the exact time of the pulse.
> ----
> Question for the list -- who of you have done multi-oscillator PLL's? Can two 10 MHz OCXO be locked to within 10 or 1 ps? For now, ignore cable issues and assume they're right next to each other.

I do similar enough things.

If you have a stable enough common reference, yes.

It's really about making sure you either react similar enough to noise
or have low enough noise that it doesn't care.

It's actually more beneficial to have a wide bandwidth PLL, since it
helps to track in difference in thermal and power before it starts to
create a large enough frequency difference. It boils down to what is
most important, the relative timing between the two clocks or stability
of the clocks.

For one system I have two clocks that acts as redundant clocks, one of
the two gets voted master and the other slave. If difference is too
large, it causes alarms. The trick is that the master has a tight
bandwidth for stability, and the slave has a higher bandwidth to track
the master closely. This produces a clock pair which is very tight for
the application. Where I only needed a few 10ths of ns, similar due care
is needed in any such system. Naturally delay offsets needs to be
compensated, and that is typically done by offsetting the mixers
through-zero point with a DC offset, and then let the PI loop drive it
to zero. The DC-offset is trimmed to have phase alignment.

> Years ago John Miles did a write-up on Warren Sarkinson's prototype TPLL. [1] If that achieves resolution of 1e-13 @ 1 s would that imply the PLL is locking to sub-ps levels?

Not as such. It's more a per-requisit of having enough resolution and
low enough noise (really two different things which has a euhm...
complex interaction it turns out).

With that, you need to be careful to have a good control loop, and my
preference ends up with a well-damped PI-loop. Potentially with an
additional low-pass filter in it.

The reason for it to be well-damped is two-folded, first of all the most
obvious one, the initial step needs to ring out quickly enough or you
have to wait for a minor eternity for it to stabilize and that in itself
makes it relatively unuseful. Secondly, the more undamped loop you have,
the more jitter-peaking you experience at the loop resonance frequency,
and as you aim to push it down to 10 ps or 1 ps this will for sure hurt you.

> Warren -- Are you still on the list? Syncing multiple 10811A oscillators to extreme levels sounds like something you would have tried. Either just for fun, or to create an N-way ensemble of OCXO for the purpose of reducing phase noise.

I hope he is still on the list. Miss him.

Physical ensembles is something I have intended to do, but never got
around to do, except of the redundancy ensamble I do.

> Rick -- Do you remember the 8-way (?) 10811A phase noise reference standard that Len used in the 5071A lab in Santa Clara?

I don't recall hearing about such a beast at HP, but love to hear more
about it. To achieve the needed effect, the actual phase does not have
to match up all that well, it just needs to become stable. A few ps here
or there does not hurt the mission need for static offsets.

I've considered doing a small board to achieve mutual sync of
oscillators. It would not be too hard to build a hierarchy of these to
form 4-way or 8-way using pair-wise locking.


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