[time-nuts] Building a DMTD/phase noise set in the 21st century

[Gerhard Hoffmann]

Yo Bubba Dudes!

(in the last post, I left out the Wenzelish stuff, because

someone would bring it up anyway.  :-)


Am 24.08.19 um 21:46 schrieb Attila Kinali:

> with homebrewn instruments. A decently fast ADC with a low
> noise voltage reference (like the LTC6655) are all you need.
> Depending on how accurately you want to measure the noise, it makes
> sense to further split this range into a lower range up to ~500kHz
> and an upper range above 500kHz. The reason is that there are today
> several high resolution ADCs available that support sampling rates of
> up to 1Msps (and some beyond),eg:
> AD7982, 18bit 1Msps
> AD7984, 18bit 1.33Msps
> AD7960, 18bit 5Msps
> LTC2386-18, 18bit 10Msps
> LTC2378-20, 20bit 1Msps
> LTC2368-24, 24bit 1Msps
> These would allow to accurately measure the noise range that is
> IMHO most interesting for most applications. Interesting because

I have made experiments with the LTC2500-32 ADC since my

Agilent 89411A has awful 1/f by itself. I have made a stamp-sized board

that supports the LTC2500, LT3042 for quiet supplies and a

LTC6655 for a quiet reference. Another stamp with a $2.50 Coolrunner

CPLD converts the 100 MHZ SPI to 4*8Bit per sample, ready to be

digested by a TI BeagleBoneBlack board for +-€45. It also creates

the sample rate from the 100 MHz clock and makes sure that everything

is asleep during the sampling window.


The BeagleBoneBlack is a 1 GHz ARM system running Linux and  2 pcs. 200MHz

RISCs for the dirty real time work. They communicate via shared memory.

On the Linux side is a SCPI-like server that talks to everyone on the 
local network.

You just open port 5025 on 192.168.178.123 and dump/read in GPIB style.

I have copied that principle unabashedly from the Agilent 89441A. No 
driver hassle.

I could also compile FFTW (the fastest FFT in the West) on the ARM and its

floating point unit performs quite OK. All compilers required come with the

Linux image, also for the slave RISCs.


The analog input side is the appropriate LT differential driver. I still 
have

no idea what to put in front of it. It works from DC. One could use the 
LT2500

built in oversampler/decimator and could dive down pretty deep in 
frequency.

That's what I'm interested in. The oversampling & filtering is where the 
LT2500-32

tries to earn its -32. And 24 bits at 1 MHz is a good start.


The BBB could support 3 ADCs from the interface; maybe 4 if one really 
tries.

There isn't much to it; see picture. At least to the hardware. The 
software was

much harder than the hardware. Most of the internet examples don't work 
with the

kernel software 2 years later. The BBB can read SPI at 48 MBPS, I never 
got that

to work. That would remove the CPLD for 1/2 the sample rate.


Everything is / will be open source, including the booting chip card.


> As most of you know, the state of the art is using direct sampling
> of the input signal and doing all the processing in the digital domain
> à la Timepod and Timepod v2.0 (aka Jackson Labs PhaseStation 53100A).
> For this you need higher sampling frequency ADCs. But, even though
> you can get 16bit ADCs with 210MHz sampling range, their SNR is

That's what I'd really like. A Zync 7045 with JESDI204B channels

and 2400 MSPS ADCs. More or less a Red Pitaya for grown-ups.

Maybe you lose some dB for the high sampling rate, but you get

that back when filtering & decimating. The 2400 MHz come from

easy clock multiplication and SAW filter cleanup.

Have a nice weekend, Gerhard



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