[time-nuts] PLL suggestions

[jimlux]

On 12/31/19 8:45 AM, Richard (Rick) Karlquist wrote:
> You need to determine your requirements for phase
> noise.  You also need to coordinate this PLL with
> the phase noise of the 3.125 GHz PLL, which will
> need its own VCO.
> 
> The best VCXO's I have found are from Abracon,
> COTS in distribution (DigiKey, etc) for only
> about $25.

+1 for Abracon - excellent phase noise performance for off the shelf 
devices that are cheap and *in stock*



  Lucky for you that 125 MHz is a
> standard frequency for them. At 3.125 GHz there are several
> vendors such as Z-comm to browse.  You need
> to find one with 3.125 GHz output frequency and then
> it needs to be low phase noise.  May not be
> available.  It's just the luck of the draw
> as to what they choose to make.
> 
> Any PLL chip with a divider and on board phase
> detector will give only mediocre performance
> (which may be good enough for you).  And it
> will require a microcontroller to load the
> gazillion registers onboard (no strapping).

This *is* the problem these days. A parallel load PLL is almost unheard 
of today.

You might look at the (formerly Hittite) HMC parts at Analog Devices - 
low phase noise on chip VCOs, and/or low noise divider that can divide 
your 3.125 down.  Hittite used to have a fixed Divide By N that could do 
your 3125  to 125 (divide by 25).

A quick glance at AD's website looks like the HMC705 can do divide by 5, 
so you could cascade a couple of these. It doesn't look like the "divide 
by anything up to 56" part still exists, at least that will take 3.125.

You might also find a HMC part with a VCO to cover your range.

If you're doing a one-off, there are eval boards with SMA connectors, 
etc. available.

   For
> high performance, you need a conventional
> multiplier from 10 MHz to, say, 120 MHz and
> then mix down to 5 MHz and use a mixer as
> a phase detector.  You can divide the 10 MHz
> by 2 using a 74AC74.
> 
> You decide: performance vs cost/simplicity.
> 
> Rick N6RK
> 
> 
> On 12/31/2019 8:01 AM, Dan Kemppainen wrote:
>> Hi All,
>>
>> We've got a project going on where we need a 125MHz clock that should 
>> be locked to 10MHz. I'm considering an on board 10MHz oscillator and 
>> external 10MHz input to utilize an external standard to lock the 
>> 125MHz which would PLL a 125MHz source.
>>
>> We've identified a few VCXO's that seem to be low noise and are small 
>> enough. The 10Mhz is easy enough. However my stumbling block is a 
>> simple PLL.
>>
>> What I'm looking for is a simple, small PLL chip. Something with 
>> external analog loop filter components to allow easy tweaking would be 
>> preferred.
>>
> 
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