[time-nuts] Distribution amplifier for 10MHz and 1 pps

[Bob kb8tq]

Hi

CMOS is what you want rather than TTL in this day and age. Propagation delay and jitter are
both much better than any of the TTL families. 

NC7SZ125: 

Prop delay 2.6 ns
Output high 50 ma max 32 ma rated 
Output low 50 ma max 32 ma rated
(rated = ~0.5V off rail at 4.5V supply)

74S140

Prop delay 6 ns
Output high 10 ma
Output low 24 ma

74AC04

Prop delay 1 to 10 ns (call it 5 ns)
Output +/- 50 ma max, +/- 24 ma rated

(all above are ok on 5V)

and we could go on and on and on…..

Anytime you do this, you run into odd things on spec sheets so comparisons are never perfect. 
I would run things at as high a voltage as possible without creating smoke. The chips are normally
faster and quieter at the higher voltage. ( = you can see a phase noise improvement going from
5.0 to 5.5V …). 

I would go with a “simple” gate rather than a Schmitt trigger. Phase noise on the simple gates
has measured lower each time I’ve checked them. Having the switch points at different levels
also tends to mess up duty cycle just a bit. (Good luck measuring that with fast edges …..). 

Bob






> On Mar 18, 2019, at 2:43 AM, Julien Goodwin <time-nuts at studio442.com.au> wrote:
> 
> The 74S140 (dual 4-input NAND) is the classic TI TTL 50-ohm driver.
> They're still available in DIP & SOIC.
> 
> I'm currently waiting on some boards to arrive so I can try SN74LVC1G17
> as a more modern replacement that's much cheaper and smaller.
> 
> Once I've proven it I'll do a separate thread to the list about the
> whole project, since it's on-topic.
> 
> On 18/3/19 1:27 pm, Bob kb8tq wrote:
>> Hi
>> 
>> CMOS is good. The faster the better. Go to your favorite vendor and find whatever is “king” this month
>> and that’s what you go with. HC has been around a *long* time and is about as slow as it gets in terms 
>> of 5V CMOS ( yes, 4000 series is slower still …).  Faster means less delay in the gate (so lower variation
>> in delay). It also turns out that faster means lower phase noise so lower jitter. 
>> 
>> Buffers are better than inverters, simply because they have higher output drive capability. One “favorite”
>> are the x125 and x126 tri-state buffers. NC7SZ125 and NC7SZ126 are two examples. 
>> 
>> If you want to drive 50 ohms, you likely will need to parallel gates in order to handle the current. There is 
>> an ongoing debate about source termination vs load termination vs “both termination” vs “don’t bother”. 
>> I would suggest that terminating one end or the other is a … errr …. really good idea. 
>> 
>> Lots more information in the archives.
>> 
>> Bob
>> 
>>> On Mar 17, 2019, at 6:39 PM, Taka Kamiya via time-nuts <time-nuts at lists.febo.com> wrote:
>>> 
>>> I'm very curious, too.  Especially when I *just* built one using 74HC04N.  
>>> 
>>> --------------------------------------- 
>>> (Mr.) Taka Kamiya
>>> I'm stuck in a wormhole....  Hello, worms! 
>>> 
>>>   On Sunday, March 17, 2019, 4:01:26 PM EDT, Hal Murray <hmurray at megapathdsl.net> wrote:  
>>> 
>>> 
>>>> For 1PPs the main goal is jitter and the selection of the ICs is very tricky 
>>> 
>>> Could you please say more?  Do you mean logic family selection, or chip 
>>> selection within a family?
>>> 
>>> Most modern digital chips are CMOS with an input threshold of VCC/2.  I'd 
>>> expect power supply noise to be important and families with faster switching 
>>> times probably make more noise.
>>> 
>>> 
>>> -- 
>>> These are my opinions.  I hate spam.
>>> 
>>> 
>>> 
>>> 
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