[time-nuts] Question for my new GPSDO

[Attila Kinali]

Hoi Tobias,

On Mon, 14 Oct 2019 11:49:29 +0000
Tobias Pluess <tobias.pluess at xwmail.ch> wrote:

> I have now designed the EFC circuit such that it is easily possible to use 
> different DAC and voltage reference models. I have also reverse-engineered 
> the circuit which is used on the Oscilloquartz GPSDO. They seem to use two 
> cascaded Sallen-Key lowpass filters with approx. 1 Hz corner frequency to 
> integrate the PWM signal, so I have included this circuit as well in my 
> design. This then allows later to test different DACs as well as the PWM.

One important and probably obvious point to notice here is, these 
filters produce some considerable amount of noise. In order to get
out best performance, the noise should be limited by the opamp.
To achieve this, the resistors have to be small (this is the reason,
why my design uses 2k2 resistors). But in order for small resistors
to have the desired corner frequency, the capacitors have to be large.
Unfortunately, large capacitors have drawbacks: high eqivalent series
resistance (ESR), high dielectric absorption (DA), high leakage, and
high microphonics. 

While the ESR in itself is not of much concern in a low frequency
application like this, it might shift the corner frequecy if a 
electrolytic capacitor with high ESR is used. In the first stage,
low ESR capacitors should be used anyways, to prevent heating from the
PWM induced ripple current, which increases aging and changes capacitance
slightly. Worst offeder are elecrolytic capacitors.

DA will be something you have to look out for. For short time constants,
DA will only give a slight offset in integrated voltage (and thus total
phase variation when looking at the output of the OCXO). But with capcitors
that have long time-constant DA, this will be indistinguishable from drift,
but with a non-constant amplitude and sign. This might cause problems with
the drift removal algorithm if not handled properly. In case the voltage
steps are always kept small over a few 100 to 1000s, then DA should have
negligible effect. Worst offenders here are electrolytic capacitors,
followed by ceramic.

Leakage adds two problems: One is temperature dependend offset and the other
is additional noise with a high flicker component. The offset is due to
leakage being a temperature dependent resistance. This will inject current
into places where no current should flow and thus change the output voltage
slightly. Additionally, due to the high resistance involved in leakage,
its noise is very high. Fortunately, the capacitor itself acts as a low-pass
filter of it and it is usually negigible in a lot of cases. But for us, this
means that the low frequency component is larger than the low frequency
component. Something we already don't want to. Additionally, due to the
way leakage current flows, it has a high flicker noise component, which
exacerbates the problem. Worst offenders here are electrolytic capacitors.

Microphonics is the capacitor exhibiting changes in capacitance and thus
voltage (charge stays the same), due to changes in dielectric constant
of the insulator or changes in the distance of the plates, due to mechanical
strain. While all capacitors exhibit this to some extend, ceramic capacitors
are quite bad at this.

Summa sumarum: if you can, use low leakage film capacitors, if not use
ceramic. Microphonics can be mitigated a bit by using ceramic capcitors
with high rated voltage. But don't expect magic from that.
 


> The next thing I am considering is the usage of the TDC7200 as an 
> interpolator. I know this topic has been discussed often, but some issues 
> still remain.
> I have attached the schematic how I planned to use the TDC7200. The 1PPS 
> pulse from the GPS module is definitely longer than 100ns, so the logic 1 
> will be clocked into the first flip-flop after max. 100ns. The 2nd flip-flop 
> gives a further delay of 100ns. So, the TDC7200 is started on the rising 
> edge of the 1PPS, and stopped with the delayed signal, such that the 
> measurement time ranges betwenn >100ns and <200ns.

You came up with the exact same solution as I did :-)

The only difference I can see is that I added more extensive filtering
than you did (yes, I'm a bit paranoid).

For the people listening in and comparing this to the TICC:
Using a 10MHz signal instead of an 1MHz signal as the TICC does
has the advantage that the TDC7200 has a lower uncertainty for
short measurement periods (see figure 17 in the datasheet).
This should potentically get the timing uncertainty RMS down to 70ps.
(probably even lower, as for 100ns the uncertainty is in the order
of 40ps)

> OK so the TDC7200 measures the phase difference between the 10MHz and the 
> 1PPS. To measure the actual frequency, the 1PPS will be used on an input 
> capture of a microcontroller (STM32F407 or something).

You will need to have a 32bit timer unit for this. So yes, you will have
to use an STM32F40x or similar.


> To trigger the input capture, should I use the same signal as for starting 
> the TDC7200, or should I use one of its delayed versions? I think it does 
> not really matter, but I am unsure.

It does. You will have to asign the edge you capture unambigously to the
reference edge of the 10MHz. The only way to do this is to use the signal
out of the half-nutt-interpolator and feed it to the uC, which in turn
derives its clock from the 10MHz. Additionally, the timer unit has to
run at a higher frequency, so you can avoid problems due to metastability.
My solution was to run the timer at 80MHz, which separates the clock
ticks far enough that each captured instance can be unambigously matched
to a 10MHz edge. Fortunately, some of the timers of the F40x are just fast
enough to manage this.

> Further, I also want my GPSDO to output an 1PPS pulse which is aligned to 
> UTC. This 1PPS is generated with an ordinary timer. However, if I do that, 
> the resulting pulse will have an arbitrary phase compared to the GPS module, 
> so how would one deal with that? Actually, one should measure the phase 
> difference between the two 1PPS signals, but this would be even more 
> complicated.

There are two steps involved: outputing the pulse on the STM32 and
making sure it is low jitter and well aligned.

Step one is done by either using the timer you used for the PPS capture
above or, if you have used all C/C units, by slaving a second one to the
first and using this to generate the output. By capturing PPS pulses, you
will know when to output the pulse  (+/- one TIM clock cycle). 

The second step is to have some D-FF's at the output to synchronize
this pulse to the 10MHz of your OCXO (see attachement). 

By selecting the realtive phase of the PPS output from the STM32 to
the 10MHz signal, you will be able to keep clear of the setup and hold
times of the FF and thus avoid metastability.


> I also don't know whether metastability could be an issue with my circuit, 
> because in the unlocked state, the 1PPS could change its state any time ond 
> so, setup or hold time of the first flip-flop is maybe violated. But I have 
> no idea how that problem should be resolved or whether it actually is a 
> problem.

Ah! I love it when people do not ignore metastability! :-D

In this case, the probability of metastability is quite low.
You use a two-step synchronizer (or half nutt-interpolator).
The probability of getting the ALVC74 into such a deep 
metastability such that it lasts 100ns is tiiiiiiiny. I don't
have numbers at hand, but I would expect this to happen maybe
once in the life time of the universe. Nevertheless you should
keep the wire from the first FF to the second short and far away
from ground to keep its capacitance low.

If you really want to be sure that you don't get into trouble, you
can steer the OCXO such, that you are about 20-30ns off from the
edge of the 10MHz signal. This way the PPS, even with the spread
from the GPS, will never be close to the clock edge.


			Attila Kinali


-- 
<JaberWorky>	The bad part of Zurich is where the degenerates
                throw DARK chocolate at you.
-------------- next part --------------
A non-text attachment was scrubbed...
Name: nutt_interpolator.pdf
Type: application/pdf
Size: 23819 bytes
Desc: not available
URL: <http://febo.com/pipermail/time-nuts_lists.febo.com/attachments/20191103/aa2c4d09/attachment.pdf>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: pulse_generator.pdf
Type: application/pdf
Size: 25851 bytes
Desc: not available
URL: <http://febo.com/pipermail/time-nuts_lists.febo.com/attachments/20191103/aa2c4d09/attachment-0001.pdf>