[time-nuts] Odd-order multiplication of CMOS-output OCXO

Magnus Danielson magnus at rubidium.se
Sun Jan 19 21:20:36 UTC 2020


Hi Mark,

On 2020-01-19 18:19, Mark Haun wrote:
> Hi Magnus,
>
> On Sun, 19 Jan 2020 15:56:37 +0100
> Magnus Danielson <magnus at rubidium.se> wrote:
>>> I also found this common-base amp circuit in the archives:
>>> https://www.febo.com/pipermail/time-nuts/2016-January/095683.html
>>> and
>>> https://www.febo.com/pipermail/time-nuts/attachments/20160126/ae3b4be8/attachment-0001.pdf
>>>
>>> I've read that I should avoid high-Q tuned circuits, because they
>>> will introduce more noise with temperature variation.  Are there
>>> any rules of thumb for how much Q is too much?  
>> You do not need very high Q, as suitable LCR will fit. Besides, if
>> there is any of the other overtones creating issues, you can build
>> LCR links tuned to these that will consume that energy.
> Thanks, this makes sense.  Any general suggestions for the active
> device selection, and circuit topology?  Is the common-base BJT circuit
> (in the archive link) a good starting point?

I have not checked. It's not very difficult, frequency select out the
right over, tone, provide gain without too much flicker noise and white
noise. Consider a diff-pair/long-tailed pair.

Other sub-tones needs to be suppressed enough to not alter transition
time too much as this would influence the jitter.

>> The other fairly obvious solution is as already suggested by Bert is
>> to use a SiLabs chip.
> I think Bert was referring to the ICS570 rather the the Si570.  The ICS
> part would completely destroy the sub-picosecond jitter performance of
> my oscillator (datasheet quotes jitter on the order of 100 ps!), so is
> not an option.  The Si570 family is interesting.  I had another look at
> the jitter / phase-noise specs and it probably would be good enough for
> an 80-MSPS ADC.  However, I have other reasons (longer-term stability)
> for wanting to use the OCXO.

But the long-term would belong to the and the step in frequency would be
due to that chip.

>> Regardless if which solution you try, what capability do you have to
>> test it? It remains an important tool here. There is no golden design
>> that just solves everything. I've recently measured how very well
>> performing devices performance was partly lost due to bad design. I
>> use the old and trusty TimePod.
> Aha, this is the elephant in the room...  I will confess, I was hoping
> for some rules of thumb that would give me 90% confidence without
> having to validate the design.  (It's a hobby project, so a certain
> amount of risk-taking is OK.)
I see. I try to recommend people to be able to measure phase noise and
stability,
> The only time/freq stuff I have currently are a couple of HP 53310A
> analyzers and a Trueposition GPSDO.  Putting together a DMTD setup
> would be fun but my project queue is already overflowing :)

You can come fairly long with a relatively trivial setup and ability to
measure spectrum.

A mixer, a PI-loop, an oscillator and then synthesis for coarse
frequency setting makes a loop that then just needs a spectrum analysis
with a bit of scaling to give you jitter. Home-brewing this should not
be too hard. Maybe it just lacks an example setup and some software
support. If one assumes offset frequencies up to 20 kHz, then the audio
ports can be used to sample and then FFT it, but many audio ports is
limited in the lower end of the spectrum, few go to DC. Yet, for the
relatively simplicity one can get started.

Oh, I need to be a little bit more specific than I was before, QRP labs
have a project called ProgRock, a fun little project. However, it does
not have an organized input, it's intended to operate on a 27 MHz
crystal. It is however an example of a cheap SiLabs project. The
ProgRock combines a simple CPU with the 5351 chip, where as often you
have a chip with basic support, but you need to program it from outside.

Cheers,
Magnus







More information about the Time-nuts_lists.febo.com mailing list