[time-nuts] ! PPS Source

[Bob kb8tq]

Hi

Keep in mind that a GPS receiver is *very* sensitive to close in phase noise on the clock source.
If you dig into the data sheets on the chip sets, they are quite explicit about this. Any approach you
use to steer the TCXO will need to be very quiet. 

Next, the internal firmware *assumes* that the oscillator does not move (much). It needs to take 
care of things like doppler on the each of the sat’s it is tracking. Doing so with a clock that moves
too much likely will not work well. 

One of the issues with the early clock sources for these devices was perturbations in the frequency
vs temperature curve. They spent a lot of time re-designing crystals to “clean them up”. The issue
was simply that a perturbation moved the frequency faster than the firmware could keep up.

Lots of fun …..

Bob



> On Aug 17, 2020, at 4:53 PM, ed breya <eb at telight.com> wrote:
> 
> Thanks all, for the info on this issue. It does indeed look doable to experiment with phase-locking the GPS RX module's internal clock to the ultimate 10 MHz GPSDO output. That is, doable, but not necessarily easy or without problems.
> 
> I dug up my old notes and info from about ten years ago, and found I had studied it quite extensively, and had some various schemes sketched out already - I forgot about all this. In the notes I found some pages from US Patents 4,785,463, and 5,745,741, which are pertinent to the Motorola Oncore RX units. I also found page 26 of a document "Remote Frequency Calibration: The NIST Frequency Measurement and Analysis Service," which talks about it too.
> 
> The internal clock appears to be 19.096 MHz nominal, +/- 2 ppm, from a TCXO, that may or may not have voltage tuning too, depending on the model. The '463 patent appears to be about the original overall design, while the '741 is about reducing the sawtooth error by doing coarse digital corrections in the counter system, while also fine tuning the VCTXO, to get an integer clock frequency under all conditions. It mentions the Oncore model as prior art, and the resulting sawtooth error.
> 
> As I understand it, the overall process disclosed is to allow for the TCXO to drift to any frequency in range, but automatically tweak it slightly to make sure it's an integer (Hz ) value, and set the counter system to divide by that same integer value, so the 1 PPS output is consistent, without sawtooth error. So, if the clock is nearly exactly right on, the counter divides by 19,096,000, and it figures out how to fine tune the clock to keep it there. If the drift goes beyond the fine range to say all the way to the upper stated limit of +38 Hz, the counter is set to divide by 19,096,038, and the clock is again tweaked to keep it close to that integer Hz. How it does all this is disclosed in the patent, but I haven't studied it enough to say any more.
> 
> It looks like this improvement was in a later model, or was perhaps never actually used, since this was around the time that Motorola was departing the GPS business. I assume the older Oncores like mine do not have any of this improvement, so are subject to both the clock drift and the sawtooth. But, one thing I got from this, is that if the nominal clock and divide numbers match, and are fixed at 19,096,000, then replacing the original clock with a sufficiently clean synthesized external clock should work too.
> 
> I have a number of possible options, depending on the actual original TCXO. If it's also voltage-tuned, but that isn't utilized, then it can stay, but needs circuit mods to release and access the tune signal. The clock signal is  accessible at the TCXO, or possibly less risky in 2X form 38.192 MHz from the downconverter IC. This would be the best option, to make an external PLL to tweak it. BTW I have a spare GPS RX unit - I would not risk taking the Z3801A out of commission and messing around with it.
> 
> If the TCXO has no tuning ability, then a new clock signal needs to be made. Of all the schemes I sketched out back then, the most straightforward seems to be simply adding 4.096 MHz from a VCXO, PLLed to 10 MHz, and 15 MHz derived directly from the 10. These can all be scaled up in frequency in various arrangements, and use standard binary frequency XOs. The next notch up for instance, is 8.192 MHz + 30 MHz giving twice the clock, and so forth. Unfortunately, this method is additive in frequency, which I hate - I prefer to take the difference of two much higher frequencies, which is so much easier to filter. I don't yet see any ways to do a difference method without using special frequencies, so for now I assume regular old standard XO frequencies will have to do, and the filter designs will need to be fancier. The PLLing seems to be straightforward. I can get a decent 16 kHz comparison frequency with simple integer dividing, like 4.096 MHz/256 = 10 MHz/625, but would like to get it as high as possible, without resorting to fancier schemes. Fractional-N is not in the cards here, I don't think.
> 
> It would be nice if for some reason a 19.096 MHz VCXO module - or even just a crystal - was available for cheap, but I doubt such exists outside of the Oncore line. Maybe a TCXO from a junker would do, but again, it has to have voltage tuning too, and I don't know if any had that. (One of my more far fetched schemes even pictured thermal tuning - TEC heating and cooling the TCXO module - but imagine the nightmare of characterizing the part and the dynamics, and the mechanical and control loop issues.)
> 
> So anyway, I think I can do it with the additive VCXO combo, but doubt I ever will - there are too many projects to worry about without reviving this one, but it's fun to ponder.
> 
> BTW one last thing is that in my collection, I have parts of an ancient (ca 1990), huge Trimble L1/L2 GPSDO. I was going to share some info on it, but it will have to wait for another time. I find it very interesting.
> 
> Ed
> 
> 
> 
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