[time-nuts] Frequency division by 81

Clint Jay cjaysharp at gmail.com
Fri Jun 19 09:42:12 UTC 2020


12F675 is specified for clock input of 20MHz and (without digging too deep
into the way the code works) I think the PICDiv code works with clock input
rather than input to a timer or counter peripheral so 20MHz would be fine.

While I'd not recommend it for use I have seen them run (experimentally) at
27MHz and I've seen anecdotal reports of over 30MHz.

It would be trivial to port the PICDiv code to a newer 12F chip, some of
which will do 48MHz, but there'd need to be validation of the results with
regard to phase noise etc.

On Fri, 19 Jun 2020 at 09:14, Bryan _ <bpl521 at outlook.com> wrote:

> I don't believe a picdiv can be used for frequencies above 20MHz. I
> believe even that is pushing the max frequency input capability of the pic
>
>
> -=Bryan=-
>
> ________________________________
> From: time-nuts <time-nuts-bounces at lists.febo.com> on behalf of Bob kb8tq
> <kb8tq at n1k.org>
> Sent: June 18, 2020 10:05 AM
> To: Discussion of precise time and frequency measurement <
> time-nuts at lists.febo.com>
> Subject: Re: [time-nuts] Frequency division by 81
>
> Hi
>
> A lot depends on the output frequency of your OCXO. If it puts out 900 MHz,
> that’s a bit different than if it puts out 9 MHz. For “normal” OCXO’s in
> the sub
> 30 MHz region, CMOS logic will do the division just fine. If a PICDIV is a
> candidate,
> I’m guessing the OCXO is in this range.
>
> You will be in the vicinity of 100 KHz with the output dividing from a 5
> or 10 MHz
> OCXO. That means the noise floor of the logic is the main issue. The
> modern LVC
> (and similar) logic families seem to have pretty good noise floors.
>
> All this is just a guess without much to base it on …..
>
> Bob
>
> > On Jun 18, 2020, at 7:58 AM, Gilles Clement <clemgill at gmail.com> wrote:
> >
> > Hi
> > I need to divide the output of an OCXO by a factor D=81 for testing
> purposes. So with minimum added phase noise.
> > PICDIV-like approches would not work (D needs to be divisible by 8 or at
> least be even)
> > I went through the archives and it seems that an Injection Locked
> Frequency Divider with resynchronization flip-flop could be a simple and
> acceptable solution.
> > As described in the following Wenzel paper: Unusual Frequency
> Dividerswww.wenzel.com › uploads › dividers <
> https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&cad=rja&uact=8&ved=2ahUKEwik49qGpIvqAhURahQKHTBVClAQFjABegQIARAB&url=http%3A%2F%2Fwww.wenzel.com%2Fwp-content%2Fuploads%2Fdividers.pdf&usg=AOvVaw2m-9lURROiSbG9XykiDNDU
> >
> > Does this make sense?
> > Gilles.
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-- 
Clint. M0UAW IO83

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